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stm32f0: rcc: doxygen update prediv 

After adding support to the f3, add missing doxygen support to the f0
equivalent.  This improves things and keeps them consistent until/if they are
pulled out as common code.
This commit is contained in:
Karl Palsson 2015-11-04 22:13:47 +00:00
parent a444aa4476
commit fd100ea6c2
2 changed files with 10 additions and 1 deletions
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4
include/libopencm3/stm32/f0/rcc.h
View File

@ -318,6 +318,9 @@ Control</b>
/* --- RCC_CFGR2 values ---------------------------------------------------- */
#define RCC_CFGR2_PREDIV 0xf
/** @defgroup rcc_cfgr2_prediv PLL source predividers
@ingroup rcc_defines
@{*/
#define RCC_CFGR2_PREDIV_NODIV 0x0
#define RCC_CFGR2_PREDIV_DIV2 0x1
#define RCC_CFGR2_PREDIV_DIV3 0x2
@ -334,6 +337,7 @@ Control</b>
#define RCC_CFGR2_PREDIV_DIV14 0xd
#define RCC_CFGR2_PREDIV_DIV15 0xe
#define RCC_CFGR2_PREDIV_DIV16 0xf
/**@}*/
/* --- RCC_CFGR3 values ---------------------------------------------------- */

7
lib/stm32/f0/rcc.c
View File

@ -483,7 +483,12 @@ void rcc_set_hpre(uint32_t hpre)
RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_HPRE) | hpre;
}
/**
* Set PLL Source pre-divider **CAUTION**.
* On F03x and F05, prediv only applies to HSE source. On others, this
* is _after_ source selection. See also f3.
* @param[in] prediv division by prediv+1 @ref rcc_cfgr2_prediv
*/
void rcc_set_prediv(uint32_t prediv)
{
RCC_CFGR2 = (RCC_CFGR2 & ~RCC_CFGR2_PREDIV) | prediv;