[STM32F3] Move the f3 specific stuff out of common.
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41ea714f53
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@ -28,8 +28,8 @@
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/** @cond */
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#ifdef LIBOPENCM3_FLASH_H
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/** @endcond */
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#ifndef LIBOPENCM3_FLASH_COMMON_F24_H
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#define LIBOPENCM3_FLASH_COMMON_F24_H
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#ifndef LIBOPENCM3_FLASH_COMMON_F234_H
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#define LIBOPENCM3_FLASH_COMMON_F234_H
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#include <libopencm3/cm3/common.h>
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@ -40,27 +40,9 @@
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#if !defined(STM32F3)
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#else
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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#endif
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#if !defined(STM32F3)
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#else
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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#define FLASH_ACR_HLFCYA (1 << 3)
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#endif
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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@ -72,86 +54,12 @@
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/* --- FLASH_SR values ----------------------------------------------------- */
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#if !defined(STM32F3)
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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#else
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#define FLASH_SR_BSY (1 << 0)
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#define FLASH_SR_ERLYBSY (1 << 1)
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#define FLASH_SR_PGPERR (1 << 2)
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#define FLASH_SR_WRPRTERR (1 << 4)
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#define FLASH_SR_EOP (1 << 5)
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#endif
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/* --- FLASH_CR values ----------------------------------------------------- */
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#if !defined(STM32F3)
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
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#define FLASH_CR_SECTOR_2 (0x02 << 3)
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#define FLASH_CR_SECTOR_3 (0x03 << 3)
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#define FLASH_CR_SECTOR_4 (0x04 << 3)
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#define FLASH_CR_SECTOR_5 (0x05 << 3)
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#define FLASH_CR_SECTOR_6 (0x06 << 3)
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#define FLASH_CR_SECTOR_7 (0x07 << 3)
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#define FLASH_CR_SECTOR_8 (0x08 << 3)
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#define FLASH_CR_SECTOR_9 (0x09 << 3)
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#define FLASH_CR_SECTOR_10 (0x0a << 3)
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#define FLASH_CR_SECTOR_11 (0x0b << 3)
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#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
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#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
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#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
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#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
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#else
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#define FLASH_CR_OBL_LAUNCH (1 << 13)
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#endif
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#if !defined(STM32F3)
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/* --- FLASH_OPTCR values -------------------------------------------------- */
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/* FLASH_OPTCR[27:16]: nWRP */
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/* FLASH_OBR[15:8]: RDP */
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#define FLASH_OPTCR_NRST_STDBY (1 << 7)
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#define FLASH_OPTCR_NRST_STOP (1 << 6)
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#define FLASH_OPTCR_WDG_SW (1 << 5)
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#define FLASH_OPTCR_OPTSTRT (1 << 1)
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#define FLASH_OPTCR_OPTLOCK (1 << 0)
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#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
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#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
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#endif
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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#if !defined(STM32F3)
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#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
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#endif
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/* --- Function prototypes ------------------------------------------------- */
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@ -165,36 +73,13 @@ void flash_clear_eop_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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void flash_wait_for_last_operation(void);
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#if !defined(STM32F3)
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_erase_all_sectors(uint32_t program_size);
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void flash_erase_sector(uint8_t sector, uint32_t program_size);
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void flash_program_double_word(uint32_t address, uint64_t data);
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void flash_program_word(uint32_t address, uint32_t data);
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void flash_program_half_word(uint32_t address, uint16_t data);
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void flash_program_byte(uint32_t address, uint8_t data);
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void flash_program(uint32_t address, uint8_t *data, uint32_t len);
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void flash_program_option_bytes(uint32_t data);
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#endif
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END_DECLS
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#endif
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/** @cond */
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#else
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#warning "flash_common_f24.h should not be included direcitly, only via flash.h"
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#warning "flash_common_f234.h should not be included direcitly,"
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#warning "only via flash.h"
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#endif
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/** @endcond */
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@ -0,0 +1,139 @@
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* PM0081 Programming manual: STM32F40xxx and STM32F41xxx Flash programming
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* September 2011, Doc ID 018520 Rev 1
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* https://github.com/libopencm3/libopencm3-archive/blob/master/st_micro/DM00023388.pdf
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*/
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/** @cond */
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#ifdef LIBOPENCM3_FLASH_H
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/** @endcond */
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#ifndef LIBOPENCM3_FLASH_COMMON_F24_H
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#define LIBOPENCM3_FLASH_COMMON_F24_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/common/flash_common_f234.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_OPTCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCE (1 << 10)
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#define FLASH_ACR_ICE (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_PGPERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_STRT (1 << 16)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_SER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_SECTOR_0 (0x00 << 3)
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#define FLASH_CR_SECTOR_1 (0x01 << 3)
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#define FLASH_CR_SECTOR_2 (0x02 << 3)
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#define FLASH_CR_SECTOR_3 (0x03 << 3)
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#define FLASH_CR_SECTOR_4 (0x04 << 3)
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#define FLASH_CR_SECTOR_5 (0x05 << 3)
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#define FLASH_CR_SECTOR_6 (0x06 << 3)
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#define FLASH_CR_SECTOR_7 (0x07 << 3)
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#define FLASH_CR_SECTOR_8 (0x08 << 3)
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#define FLASH_CR_SECTOR_9 (0x09 << 3)
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#define FLASH_CR_SECTOR_10 (0x0a << 3)
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#define FLASH_CR_SECTOR_11 (0x0b << 3)
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#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
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#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
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#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
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#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
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/* --- FLASH_OPTCR values -------------------------------------------------- */
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/* FLASH_OPTCR[27:16]: nWRP */
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/* FLASH_OBR[15:8]: RDP */
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#define FLASH_OPTCR_NRST_STDBY (1 << 7)
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#define FLASH_OPTCR_NRST_STOP (1 << 6)
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#define FLASH_OPTCR_WDG_SW (1 << 5)
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#define FLASH_OPTCR_OPTSTRT (1 << 1)
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#define FLASH_OPTCR_OPTLOCK (1 << 0)
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#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
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#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
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#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_erase_all_sectors(uint32_t program_size);
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void flash_erase_sector(uint8_t sector, uint32_t program_size);
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void flash_program_double_word(uint32_t address, uint64_t data);
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void flash_program_word(uint32_t address, uint32_t data);
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void flash_program_half_word(uint32_t address, uint16_t data);
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void flash_program_byte(uint32_t address, uint8_t data);
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void flash_program(uint32_t address, uint8_t *data, uint32_t len);
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void flash_program_option_bytes(uint32_t data);
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END_DECLS
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#endif
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/** @cond */
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#else
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#warning "flash_common_f24.h should not be included direcitly,"
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#warning "only via flash.h"
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#endif
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/** @endcond */
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#define LIBOPENCM3_FLASH_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/common/flash_common_f234.h>
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#include <libopencm3/stm32/common/flash_common_f24.h>
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#endif
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/common/flash_common_f234.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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#define FLASH_ACR_HLFCYA (1 << 3)
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 0)
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#define FLASH_SR_ERLYBSY (1 << 1)
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#define FLASH_SR_PGPERR (1 << 2)
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#define FLASH_SR_WRPRTERR (1 << 4)
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#define FLASH_SR_EOP (1 << 5)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_OBL_LAUNCH (1 << 13)
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#endif
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#define LIBOPENCM3_FLASH_H
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/stm32/common/flash_common_f234.h>
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#include <libopencm3/stm32/common/flash_common_f24.h>
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#endif
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#include <libopencm3/stm32/flash.h>
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#if !defined(STM32F3)
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static inline void flash_set_program_size(uint32_t psize)
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{
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FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
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FLASH_CR |= psize;
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}
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void flash_dcache_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_DCE;
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}
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void flash_dcache_disable(void)
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{
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FLASH_ACR &= ~FLASH_ACR_DCE;
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}
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void flash_icache_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_ICE;
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}
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void flash_icache_disable(void)
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{
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FLASH_ACR &= ~FLASH_ACR_ICE;
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}
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void flash_prefetch_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_PRFTEN;
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}
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void flash_prefetch_disable(void)
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{
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||||
FLASH_ACR &= ~FLASH_ACR_PRFTEN;
|
||||
}
|
||||
|
||||
void flash_dcache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCRST;
|
||||
}
|
||||
|
||||
void flash_icache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICRST;
|
||||
}
|
||||
|
||||
void flash_clear_pgserr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGSERR;
|
||||
}
|
||||
|
||||
void flash_clear_pgaerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGAERR;
|
||||
}
|
||||
|
||||
void flash_clear_wrperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_WRPERR;
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
void flash_set_ws(uint32_t ws)
|
||||
{
|
||||
uint32_t reg32;
|
||||
|
@ -125,155 +60,8 @@ void flash_clear_bsy_flag(void)
|
|||
FLASH_SR &= ~FLASH_SR_BSY;
|
||||
}
|
||||
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
#if !defined(STM32F3)
|
||||
flash_clear_pgserr_flag();
|
||||
flash_clear_pgaerr_flag();
|
||||
flash_clear_wrperr_flag();
|
||||
#endif
|
||||
flash_clear_pgperr_flag();
|
||||
flash_clear_eop_flag();
|
||||
flash_clear_bsy_flag();
|
||||
}
|
||||
|
||||
void flash_wait_for_last_operation(void)
|
||||
{
|
||||
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
|
||||
}
|
||||
|
||||
#if !defined(STM32F3)
|
||||
|
||||
void flash_unlock_option_bytes(void)
|
||||
{
|
||||
/* Clear the unlock state. */
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
|
||||
/* Unlock option bytes. */
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY1;
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY2;
|
||||
}
|
||||
|
||||
void flash_lock_option_bytes(void)
|
||||
{
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
}
|
||||
|
||||
void flash_program_double_word(uint32_t address, uint64_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X64);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO64(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_word(uint32_t address, uint32_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X32);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO32(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_half_word(uint32_t address, uint16_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X16);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO16(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_program_byte(uint32_t address, uint8_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X8);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO8(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_program(uint32_t address, uint8_t *data, uint32_t len)
|
||||
{
|
||||
/* TODO: Use dword and word size program operations where possible for
|
||||
* turbo speed.
|
||||
*/
|
||||
uint32_t i;
|
||||
for (i = 0; i < len; i++) {
|
||||
flash_program_byte(address+i, data[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void flash_erase_sector(uint8_t sector, uint32_t program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR &= ~(0xF << 3);
|
||||
FLASH_CR |= (sector << 3) & 0x78;
|
||||
FLASH_CR |= FLASH_CR_SER;
|
||||
FLASH_CR |= FLASH_CR_STRT;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_SER;
|
||||
FLASH_CR &= ~(0xF << 3);
|
||||
}
|
||||
|
||||
void flash_erase_all_sectors(uint32_t program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR |= FLASH_CR_MER; /* Enable mass erase. */
|
||||
FLASH_CR |= FLASH_CR_STRT; /* Trigger the erase. */
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */
|
||||
}
|
||||
|
||||
void flash_program_option_bytes(uint32_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
if (FLASH_OPTCR & FLASH_OPTCR_OPTLOCK) {
|
||||
flash_unlock_option_bytes();
|
||||
}
|
||||
|
||||
FLASH_OPTCR = data & ~0x3;
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte prog. */
|
||||
flash_wait_for_last_operation();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -0,0 +1,224 @@
|
|||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
|
||||
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <libopencm3/stm32/flash.h>
|
||||
|
||||
static inline void flash_set_program_size(uint32_t psize)
|
||||
{
|
||||
FLASH_CR &= ~(((1 << 0) | (1 << 1)) << 8);
|
||||
FLASH_CR |= psize;
|
||||
}
|
||||
|
||||
void flash_dcache_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCE;
|
||||
}
|
||||
|
||||
void flash_dcache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_DCE;
|
||||
}
|
||||
|
||||
void flash_icache_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICE;
|
||||
}
|
||||
|
||||
void flash_icache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_ICE;
|
||||
}
|
||||
|
||||
void flash_prefetch_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_PRFTEN;
|
||||
}
|
||||
|
||||
void flash_prefetch_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_PRFTEN;
|
||||
}
|
||||
|
||||
void flash_dcache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCRST;
|
||||
}
|
||||
|
||||
void flash_icache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICRST;
|
||||
}
|
||||
|
||||
void flash_clear_pgserr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGSERR;
|
||||
}
|
||||
|
||||
void flash_clear_pgaerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGAERR;
|
||||
}
|
||||
|
||||
void flash_clear_wrperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_WRPERR;
|
||||
}
|
||||
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
flash_clear_pgserr_flag();
|
||||
flash_clear_pgaerr_flag();
|
||||
flash_clear_wrperr_flag();
|
||||
flash_clear_pgperr_flag();
|
||||
flash_clear_eop_flag();
|
||||
flash_clear_bsy_flag();
|
||||
}
|
||||
|
||||
void flash_unlock_option_bytes(void)
|
||||
{
|
||||
/* Clear the unlock state. */
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
|
||||
/* Unlock option bytes. */
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY1;
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY2;
|
||||
}
|
||||
|
||||
void flash_lock_option_bytes(void)
|
||||
{
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTLOCK;
|
||||
}
|
||||
|
||||
void flash_program_double_word(uint32_t address, uint64_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X64);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO64(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_word(uint32_t address, uint32_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X32);
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the first half of the word. */
|
||||
MMIO32(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
void flash_program_half_word(uint32_t address, uint16_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X16);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO16(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_program_byte(uint32_t address, uint8_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(FLASH_CR_PROGRAM_X8);
|
||||
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
MMIO8(address) = data;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */
|
||||
}
|
||||
|
||||
void flash_program(uint32_t address, uint8_t *data, uint32_t len)
|
||||
{
|
||||
/* TODO: Use dword and word size program operations where possible for
|
||||
* turbo speed.
|
||||
*/
|
||||
uint32_t i;
|
||||
for (i = 0; i < len; i++) {
|
||||
flash_program_byte(address+i, data[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void flash_erase_sector(uint8_t sector, uint32_t program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR &= ~(0xF << 3);
|
||||
FLASH_CR |= (sector << 3) & 0x78;
|
||||
FLASH_CR |= FLASH_CR_SER;
|
||||
FLASH_CR |= FLASH_CR_STRT;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_SER;
|
||||
FLASH_CR &= ~(0xF << 3);
|
||||
}
|
||||
|
||||
void flash_erase_all_sectors(uint32_t program_size)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
flash_set_program_size(program_size);
|
||||
|
||||
FLASH_CR |= FLASH_CR_MER; /* Enable mass erase. */
|
||||
FLASH_CR |= FLASH_CR_STRT; /* Trigger the erase. */
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */
|
||||
}
|
||||
|
||||
void flash_program_option_bytes(uint32_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
if (FLASH_OPTCR & FLASH_OPTCR_OPTLOCK) {
|
||||
flash_unlock_option_bytes();
|
||||
}
|
||||
|
||||
FLASH_OPTCR = data & ~0x3;
|
||||
FLASH_OPTCR |= FLASH_OPTCR_OPTSTRT; /* Enable option byte prog. */
|
||||
flash_wait_for_last_operation();
|
||||
}
|
|
@ -39,7 +39,8 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
|
|||
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
|
||||
iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \
|
||||
timer_common_all.o timer_common_f24.o usart_common_all.o \
|
||||
flash_common_f234.o hash_common_f24.o crypto_common_f24.o
|
||||
flash_common_f234.o flash_common_f24.o hash_common_f24.o \
|
||||
crypto_common_f24.o
|
||||
|
||||
VPATH += ../../usb:../:../../cm3:../common
|
||||
|
||||
|
|
|
@ -39,7 +39,8 @@ OBJS = rcc.o gpio.o adc.o exti2.o i2c.o
|
|||
OBJS += gpio_common_all.o gpio_common_f234.o \
|
||||
dac_common_all.o usart_common_all.o crc_common_all.o\
|
||||
iwdg_common_all.o spi_common_all.o dma_common_f13.o\
|
||||
timer_common_all.o timer_common_f24.o flash_common_f234.o
|
||||
timer_common_all.o timer_common_f24.o flash_common_f234.o \
|
||||
flash.o
|
||||
|
||||
OBJS += usb.o usb_control.o usb_standard.o usb_f103.o
|
||||
|
||||
|
|
|
@ -0,0 +1,28 @@
|
|||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
|
||||
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <libopencm3/stm32/flash.h>
|
||||
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
flash_clear_pgperr_flag();
|
||||
flash_clear_eop_flag();
|
||||
flash_clear_bsy_flag();
|
||||
}
|
|
@ -40,8 +40,8 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
|
|||
gpio_common_all.o gpio_common_f234.o i2c_common_all.o \
|
||||
iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \
|
||||
spi_common_all.o timer_common_all.o timer_common_f24.o \
|
||||
usart_common_all.o flash_common_f234.o hash_common_f24.o \
|
||||
crypto_common_f24.o
|
||||
usart_common_all.o flash_common_f234.o flash_common_f24.o \
|
||||
hash_common_f24.o crypto_common_f24.o
|
||||
|
||||
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \
|
||||
usb_f107.o usb_f207.o
|
||||
|
|
Loading…
Reference in New Issue