doxygen: fix many warnings on "end of file while in group"
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@ -388,7 +388,7 @@ Unmask bits [(n-1)..0] of LFSR/Triangle Amplitude equal to (2**(n+1)-1
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/** DAC channel 2 DMA underrun flag */
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#define DAC_SR_DMAUDR2 (1 << 29)
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/*@}*/
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/**@}*/
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/** DAC channel identifier */
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typedef enum {
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@ -97,7 +97,7 @@ specific memorymap.h header before including this header file.*/
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/** PVU: Watchdog prescaler value update */
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#define IWDG_SR_PVU (1 << 0)
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/*@}*/
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/**@}*/
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/* --- IWDG function prototypes---------------------------------------------- */
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@ -40,6 +40,8 @@ specific memorymap.h header before including this header file.*/
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#ifndef LIBOPENCM3_RTC2_H
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#define LIBOPENCM3_RTC2_H
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/**@{*/
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/** @defgroup rtc_registers RTC Registers
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* @ingroup rtc_defines
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* @brief Real Time Clock registers
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@ -100,7 +102,7 @@ specific memorymap.h header before including this header file.*/
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/** RTC backup registers (RTC_BKPxR) */
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#define RTC_BKPXR(reg) MMIO32(RTC_BKP_BASE + (4 * (reg)))
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/*@}*/
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/**@}*/
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/** @defgroup rtc_tr_values RTC Time register (RTC_TR) values
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@ -133,7 +135,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_TR_SU_SHIFT (0)
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/** Second units in BCD format mask */
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#define RTC_TR_SU_MASK (0xf)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_dr_values RTC Date register (RTC_DR) values
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* @ingroup rtc_registers
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@ -167,7 +169,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_DR_DU_SHIFT (0)
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/** Date units in BCD format mask */
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#define RTC_DR_DU_MASK (0xf)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_cr_values RTC control register (RTC_CR) values
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* @ingroup rtc_registers
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@ -191,7 +193,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_CR_OSEL_ALARMA (0x1)
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#define RTC_CR_OSEL_ALARMB (0x2)
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#define RTC_CR_OSEL_WAKEUP (0x3)
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/*@}*/
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/**@}*/
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/** Output polarity */
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#define RTC_CR_POL (1<<20)
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@ -239,7 +241,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_CR_WUCLKSEL_RTC_DIV2 (0x3)
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#define RTC_CR_WUCLKSEL_SPRE (0x4)
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#define RTC_CR_WUCLKSEL_SPRE_216 (0x6)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_isr_values RTC initialization and status register (RTC_ISR) values
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* @ingroup rtc_registers
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@ -280,7 +282,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_ISR_ALRBWF (1<<1)
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/** ALRAWF: Alarm A write flag */
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#define RTC_ISR_ALRAWF (1<<0)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_prer_values RTC prescaler register (RTC_PRER) values
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* @ingroup rtc_registers
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@ -293,7 +295,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_PRER_PREDIV_S_SHIFT (0)
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/** Sync prescaler factor mask */
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#define RTC_PRER_PREDIV_S_MASK (0x7fff)
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/*@}*/
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/**@}*/
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/* RTC calibration register (RTC_CALIBR) ------------------------ */
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#define RTC_CALIBR_DCS (1 << 7)
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@ -327,7 +329,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_ALRMXR_ST_MASK (0x7)
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#define RTC_ALRMXR_SU_SHIFT (0)
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#define RTC_ALRMXR_SU_MASK (0xf)
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/*@}*/
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/**@}*/
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/* RTC shift control register (RTC_SHIFTR) ---------------------- */
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#define RTC_SHIFTR_ADD1S (31)
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@ -351,7 +353,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_TSTR_ST_MASK (0x7)
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#define RTC_TSTR_SU_SHIFT (0)
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#define RTC_TSTR_SU_MASK (0xf)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_tsdr_values RTC time stamp date register (RTC_TSDR) values
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* @ingroup rtc_registers
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@ -365,7 +367,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_TSDR_DT_MASK (0x3)
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#define RTC_TSDR_DU_SHIFT (0)
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#define RTC_TSDR_DU_MASK (0xf)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_calr_values RTC calibration register (RTC_CALR) values
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* @ingroup rtc_registers
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@ -375,7 +377,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_CALR_CALW16 (1 << 13)
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#define RTC_CALR_CALM_SHIFT (0)
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#define RTC_CALR_CALM_MASK (0x1ff)
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/*@}*/
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/**@}*/
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/** @defgroup rtc_tafcr_values RTC tamper and alternate function configuration register (RTC_TAFCR) values
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* @ingroup rtc_registers
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@ -416,7 +418,7 @@ specific memorymap.h header before including this header file.*/
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#define RTC_TAFCR_TAMPIE (1<<2)
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#define RTC_TAFCR_TAMP1TRG (1<<1)
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#define RTC_TAFCR_TAMP1E (1<<0)
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/*@}*/
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/**@}*/
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/* RTC alarm X sub second register ------------------------------ */
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/* Note: Applies to RTC_ALRMASSR and RTC_ALRMBSSR */
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@ -281,7 +281,7 @@
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#define RCC_AHBENR_SRAMEN (1 << 2)
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#define RCC_AHBENR_DMA2EN (1 << 1)
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#define RCC_AHBENR_DMA1EN (1 << 0)
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/*@}*/
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/**@}*/
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/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values
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@{*/
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@ -1,6 +1,6 @@
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/** @defgroup crs_defines CRS Defines
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*
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* @brief <b>Defined Constants and Types for the Clock Recovery System.</b>
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* @brief <b>Defined Constants and Types for the Clock Recovery System</b>
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*
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* @ingroup STM32G4xx_defines
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*
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@ -26,8 +26,8 @@ LGPL License Terms @ref lgpl_license
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_DMAMUX_H
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#define LIBOPENCM3_DMAMUX_H
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#pragma once
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/**@{*/
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#include <libopencm3/stm32/common/dmamux_common_all.h>
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@ -63,6 +63,7 @@ LGPL License Terms @ref lgpl_license
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#define DMAMUX_CxCR_SYNC_ID_DMAMUX_CH2_EVT 18
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#define DMAMUX_CxCR_SYNC_ID_DMAMUX_CH3_EVT 19
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#define DMAMUX_CxCR_SYNC_ID_LPTIM1_OUT 20
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/**@}*/
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/** @defgroup dmamux_cxcr_dmareq_id DMAREQID DMA request line selected
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@ -213,4 +214,3 @@ LGPL License Terms @ref lgpl_license
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/**@}*/
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/**@}*/
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#endif
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@ -177,7 +177,7 @@
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#define RCC_CFGR_HPRE_DIV128 0xd
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#define RCC_CFGR_HPRE_DIV256 0xe
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#define RCC_CFGR_HPRE_DIV512 0xf
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/*@}*/
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/**@}*/
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#define RCC_CFGR_HPRE_MASK 0xf
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#define RCC_CFGR_HPRE_SHIFT 4
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@ -207,6 +207,7 @@
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#define RCC_PLLCFGR_PLLR_DIV4 1
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#define RCC_PLLCFGR_PLLR_DIV6 2
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#define RCC_PLLCFGR_PLLR_DIV8 3
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/**@}*/
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#define RCC_PLLCFGR_PLLR_SHIFT 25
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#define RCC_PLLCFGR_PLLR_MASK 0x3
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@ -446,15 +447,15 @@
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#define RCC_APB1ENR1_TIM4EN (1 << 2)
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#define RCC_APB1ENR1_TIM3EN (1 << 1)
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#define RCC_APB1ENR1_TIM2EN (1 << 0)
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/*@}*/
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/**@}*/
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/** @defgroup rcc_apb1enr2_en RCC_APB1ENR2 enable values
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*@{*/
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#define RCC_APB1ENR2_UCPD1EN (1 << 8)
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#define RCC_APB1ENR2_I2C4EN (1 << 1)
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#define RCC_APB1ENR2_LPUART1EN (1 << 0)
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/*@}*/
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/*@}*/
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/**@}*/
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/**@}*/
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/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values
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*@{*/
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@ -331,7 +331,7 @@
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#define RCC_AHBENR_GPIOCEN (1 << 2)
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#define RCC_AHBENR_GPIOBEN (1 << 1)
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#define RCC_AHBENR_GPIOAEN (1 << 0)
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/*@}*/
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/**@}*/
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/* --- RCC_APB2ENR values -------------------------------------------------- */
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#define RCC_APB2ENR_TIM10EN (1 << 3)
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#define RCC_APB2ENR_TIM9EN (1 << 2)
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#define RCC_APB2ENR_SYSCFGEN (1 << 0)
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/*@}*/
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/**@}*/
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/* --- RCC_APB1ENR values -------------------------------------------------- */
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#define RCC_APB1ENR_TIM4EN (1 << 2)
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#define RCC_APB1ENR_TIM3EN (1 << 1)
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#define RCC_APB1ENR_TIM2EN (1 << 0)
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/*@}*/
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/**@}*/
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/* --- RCC_AHBLPENR -------------------------------------------------------- */
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#define RCC_AHBLPENR_DMA1LPEN (1 << 24)
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@ -49,4 +49,4 @@ void flash_unlock_option_bytes(void)
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FLASH_OPTKEYR = FLASH_OPTKEYR_KEY2;
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}
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/*@}*/
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/**@}*/
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@ -109,4 +109,4 @@ void opamp_vm_select(uint32_t base, uint32_t vm)
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OPAMP_CSR(base) |= vm << OPAMP_CSR_VM_SEL_SHIFT;
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}
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/*@}*/
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/**@}*/
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@ -53,4 +53,4 @@ void opamp_vms_select(uint32_t base, uint32_t vms)
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OPAMP_CSR(base) |= vms << OPAMP_CSR_VMS_SEL_SHIFT;
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}
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/*@}*/
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/**@}*/
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@ -49,4 +49,4 @@ void opamp_output_set_external(uint32_t base)
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OPAMP_CSR(base) &= ~OPAMP_CSR_OPAINTOEN;
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}
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/*@}*/
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/**@}*/
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@ -27,7 +27,6 @@
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/adc.h>
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