[fix] after phyid addition, the init function should init correct phy.
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bb8980efc6
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@ -719,7 +719,7 @@ void eth_desc_init(uint8_t *buf, uint32_t nTx, uint32_t nRx, uint32_t cTx,
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bool eth_tx(uint8_t *ppkt, uint32_t n);
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bool eth_rx(uint8_t *ppkt, uint32_t *len, uint32_t maxlen);
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void eth_init(enum eth_clk clock);
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void eth_init(uint8_t phy,enum eth_clk clock);
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void eth_start(void);
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void eth_enable_checksum_offload(void);
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@ -737,8 +737,8 @@ END_DECLS
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* rcc_periph_reset_pulse(RCC_ETHMAC);
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* [ init gpio pins ]
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* rcc_periph_reset_pulse(RCC_ETHMAC);
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* phy_init();
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* eth_init();
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* phy_init(0);
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* eth_init(0, ETH_CLK_025_035MHZ);
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* eth_set_mac(mac);
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* eth_desc_init(buffer, ð_buffer[0], ETH_TXBUFNB, ETH_RXBUFNB,
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* ETH_TX_BUF_SIZE, ETH_RX_BUF_SIZE, false);
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@ -200,10 +200,10 @@ void eth_start(void)
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*
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* @param[in] clock enum eth_clk Core clock speed
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*/
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void eth_init(enum eth_clk clock)
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void eth_init(uint8_t phy, enum eth_clk clock)
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{
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ETH_MACMIIAR = clock;
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phy_reset();
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phy_reset(phy);
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ETH_MACCR = ETH_MACCR_CSTF | ETH_MACCR_FES | ETH_MACCR_DM |
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ETH_MACCR_APCS | ETH_MACCR_RD;
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