spi: drop misleading explicit baudrate comments
The SPI br parameter has always been the 3 bit fpclk divider field, and
was never a target or explicit bit rate. Correct the comments, and drop
the duplicate commentary that wasn't included in the doxygen output
anyway.
Fixes: a7a3770d
Add initial SPI code
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@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
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@note The I2S protocol shares the SPI hardware so the two protocols cannot be
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used at the same time on the same peripheral.
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Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words,
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Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
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LSB first.
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@code
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spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
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SPI_CR1_LSBFIRST);
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spi_write(SPI1, 0x55); // 8-bit write
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@ -54,19 +54,6 @@ LSB first.
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#include <libopencm3/stm32/spi.h>
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#include <libopencm3/stm32/rcc.h>
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/*
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* SPI and I2S code.
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*
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* Examples:
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* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
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* SPI_CR1_LSBFIRST);
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* spi_write(SPI1, 0x55); // 8-bit write
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* spi_write(SPI1, 0xaa88); // 16-bit write
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* reg8 = spi_read(SPI1); // 8-bit read
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* reg16 = spi_read(SPI1); // 16-bit read
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*/
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/**@{*/
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/*---------------------------------------------------------------------------*/
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@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
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@note The I2S protocol shares the SPI hardware so the two protocols cannot be
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used at the same time on the same peripheral.
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Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words,
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Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
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LSB first.
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@code
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spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT,
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SPI_CR1_LSBFIRST);
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spi_write(SPI1, 0x55); // 8-bit write
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@ -54,19 +54,6 @@ LSB first.
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#include <libopencm3/stm32/spi.h>
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#include <libopencm3/stm32/rcc.h>
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/*
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* SPI and I2S code.
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*
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* Examples:
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* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_CRCL_8BIT,
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* SPI_CR1_LSBFIRST);
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* spi_write(SPI1, 0x55); // 8-bit write
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* spi_write(SPI1, 0xaa88); // 16-bit write
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* reg8 = spi_read(SPI1); // 8-bit read
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* reg16 = spi_read(SPI1); // 16-bit read
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*/
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/**@{*/
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/*---------------------------------------------------------------------------*/
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@ -16,10 +16,10 @@ is also supported. A CRC can be generated and checked in hardware.
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@note The I2S protocol shares the SPI hardware so the two protocols cannot be
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used at the same time on the same peripheral.
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Example: 1Mbps, positive clock polarity, leading edge trigger, 8-bit words,
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Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words,
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LSB first.
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@code
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spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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spi_init_master(SPI1, SPI_CR1_BR_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
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SPI_CR1_LSBFIRST);
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spi_write(SPI1, 0x55); // 8-bit write
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@ -54,19 +54,6 @@ LSB first.
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#include <libopencm3/stm32/spi.h>
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#include <libopencm3/stm32/rcc.h>
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/*
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* SPI and I2S code.
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*
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* Examples:
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* spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
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* SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
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* SPI_CR1_LSBFIRST);
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* spi_write(SPI1, 0x55); // 8-bit write
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* spi_write(SPI1, 0xaa88); // 16-bit write
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* reg8 = spi_read(SPI1); // 8-bit read
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* reg16 = spi_read(SPI1); // 16-bit read
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*/
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/**@{*/
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/*---------------------------------------------------------------------------*/
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