Linker generation script for most of the supported chips
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################################################################################
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#
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# Device chip tree definition file.
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#
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# Copyright (c) 2013 Frantisek Burian <Bufran@seznam.cz>
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# Copyright (C) 2013 Werner Almesberger <wpwrak>
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#
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# Line description:
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# <pattern> <parent> (<data> ...)
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#
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# <pattern>: is the pattern for the chip description to be searched for.
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# The case of the pattern string is ignored.
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# Pattern match symbols:
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# ? - matches exactly one character
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# * - matches none or more characters
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# + - matches single or more characters
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#
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# <parent>: is the parent group name, where the search will continue.
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# There are special parents names that controls traversing:
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# "END" - Exit traversal.
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# "+" - Don't change the parent. Use for split long line to two.
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#
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# <data>: space-separated list of preprocessor symbols supplied to the linker.
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# -D option name is automatically prepended to each symbol definition
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#
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# All lines starting with # symbol are treated as Comments
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#
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# Recommended tree hierarchy:
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#
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# <device name> <family group> <device specific params>
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# +- <family group> <family> <family group specific params>
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# +- <family> <architecture> <device family specific params>
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# +- <architecture> END <architecture specific params>
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#
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# You can split the long line into two or more by using "+" in the parent field,
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# and defining same regex with appropriate parent on the next line. Example:
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#
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# device + PARAM1=aaa PARAM2=bbbb PARAM3=ccc PARAM4=dddd PARAM5=eeee
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# device parent PARAM6=ffff PARAM7=gggg PARAM8=hhhh
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# parent END
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#
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# The order of the lines is important. After the regex match, its parent will
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# be used for match on the next line. If two regexp lines matches input, only
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# the first will be evaluated, except special group definition "+"
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#
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# The regex matches entire sym
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################################################################################
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# the STM32 chips
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stm32f05[01]?4* stm32f0 ROM=16K RAM=4K
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stm32f05[01]?6* stm32f0 ROM=32K RAM=4K
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stm32f051?8* stm32f0 ROM=64K RAM=8K
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stm32f10[012]?4* stm32f1 ROM=16K RAM=4K
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stm32f103?4* stm32f1 ROM=16K RAM=6K
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stm32f100?6* stm32f1 ROM=32K RAM=4K
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stm32f103?6* stm32f1 ROM=32K RAM=10K
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stm32f10[12]?6* stm32f1 ROM=32K RAM=6K
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stm32f100?8* stm32f1 ROM=64K RAM=8K
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stm32f10[12]?8* stm32f1 ROM=64K RAM=10K
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stm32f103?8* stm32f1 ROM=64K RAM=20K
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stm32f100?b* stm32f1 ROM=128K RAM=8K
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stm32f10[12]?b* stm32f1 ROM=128K RAM=16K
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stm32f103?b* stm32f1 ROM=128K RAM=20K
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stm32f10[57]?b* stm32f1 ROM=128K RAM=64K
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stm32f100?c* stm32f1 ROM=256K RAM=24K
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stm32f101?c* stm32f1 ROM=256K RAM=32K
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stm32f103?c* stm32f1 ROM=256K RAM=48K
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stm32f10[57]?c* stm32f1 ROM=256K RAM=64K
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stm32f100?d* stm32f1 ROM=384K RAM=32K
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stm32f101?d* stm32f1 ROM=384K RAM=48K
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stm32f103?d* stm32f1 ROM=384K RAM=64K
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stm32f100?e* stm32f1 ROM=512K RAM=32K
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stm32f101?e* stm32f1 ROM=512K RAM=48K
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stm32f103?e* stm32f1 ROM=512K RAM=64K
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stm32f100?f* stm32f1 ROM=768K RAM=80K
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stm32f103?f* stm32f1 ROM=768K RAM=96K
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stm32f100?g* stm32f1 ROM=1024K RAM=80K
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stm32f103?g* stm32f1 ROM=1024K RAM=96K
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stm32f205?b* stm32f2 ROM=128K RAM=64K
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stm32f205?c* stm32f2 ROM=256K RAM=96K
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stm32f207?c* stm32f2 ROM=256K RAM=128K
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stm32f2[01][57]?e* stm32f2 ROM=512K RAM=128K
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stm32f20[57]?f* stm32f2 ROM=768K RAM=128K
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stm32f2[01][57]?g* stm32f2 ROM=1024K RAM=128K
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stm32f302?b* stm32f3ccm ROM=128K RAM=24K CCM=8K
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stm32f302?c* stm32f3ccm ROM=256K RAM=32K CCM=8K
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stm32f303?b* stm32f3ccm ROM=128K RAM=40K CCM=8K
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stm32f3[01]3?c* stm32f3ccm ROM=256K RAM=48K CCM=8K
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stm32f373?8* stm32f3 ROM=64K RAM=16K
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stm32f373?b* stm32f3 ROM=128K RAM=24K
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stm32f3[78]3?8* stm32f3 ROM=256K RAM=32K
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stm32f401?b* stm32f4 ROM=128K RAM=64K
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stm32f401?c* stm32f4 ROM=256K RAM=64K
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stm32f4[01][57]?e* stm32f4ccm ROM=512K RAM=128K CCM=64K
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stm32f4[01][57]?g* stm32f4ccm ROM=1024K RAM=128K CCM=64K
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stm32f4[23][79]?g* stm32f4ccm ROM=1024K RAM=192K CCM=64K
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stm32f4[23][79]?i* stm32f4ccm ROM=2048K RAM=192K CCM=64K
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stm32l100?6* stm32l1 ROM=32K RAM=4K
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stm32l100?8* stm32l1 ROM=64K RAM=8K
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stm32l100?b* stm32l1 ROM=128K RAM=10K
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stm32l15[12]?6* stm32l1eep ROM=32K RAM=10K EEP=4K
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stm32l15[12]?8* stm32l1eep ROM=64K RAM=10K EEP=4K
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stm32l15[12]?b* stm32l1eep ROM=128K RAM=16K EEP=4K
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stm32l15[12]?c* stm32l1eep ROM=256K RAM=32K EEP=8K
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stm32l15[12]?d* stm32l1eep ROM=384K RAM=48K EEP=12K
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stm32ts60 stm32t ROM=32K RAM=10K
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stm32w108c8 stm32w ROM=64K RAM=8K
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stm32w108?b stm32w ROM=128K RAM=8K
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stm32w108cz stm32w ROM=192K RAM=12K
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stm32w108cc stm32w ROM=256K RAM=16K
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################################################################################
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# the SAM3 chips
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sam3a4* sam3a ROM=256K RAM=64K
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sam3a8* sam3a ROM=512K RAM=96K
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sam3n00* sam3n ROM=16K RAM=4K
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sam3n0* sam3n ROM=32K RAM=8K
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sam3n1* sam3n ROM=64K RAM=8K
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sam3n2* sam3n ROM=128K RAM=16K
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sam3n4* sam3n ROM=256K RAM=24K
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sam3s1* sam3s ROM=64K RAM=16K
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sam3s2* sam3s ROM=128K RAM=32K
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sam3s4* sam3s ROM=256K RAM=48K
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sam3u1* sam3u ROM=64K RAM=20K
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sam3u2* sam3u ROM=128K RAM=36K
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sam3u4* sam3u ROM=256K RAM=52K
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sam3x4* sam3x ROM=256K RAM=64K
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sam3x8* sam3x ROM=512K RAM=96K
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################################################################################
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# the lpc chips
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lpc1311* lpc13 ROM=8K RAM=4K
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lpc1313* lpc13 ROM=32K RAM=8K
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lpc1342* lpc13 ROM=16K RAM=4K
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lpc1343* lpc13 ROM=32K RAM=8K
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lpc1315* lpc13u ROM=32K RAM=8K
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lpc1316* lpc13u ROM=48K RAM=8K
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lpc1317* lpc13u ROM=64K RAM=8K RAM1=2K
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lpc1345* lpc13u ROM=32K RAM=8K USBRAM=2K
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lpc1346* lpc13u ROM=48K RAM=8K USBRAM=2K
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lpc1346* lpc13u ROM=64K RAM=8K USBRAM=2K RAM1=2K
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lpc1751* lpc175x ROM=32K RAM=8K
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lpc1752* lpc175x ROM=64K RAM=16K
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lpc1754* lpc175x ROM=128K RAM=16K RAM1=16K
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lpc1756* lpc175x ROM=256K RAM=16K RAM1=16K
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lpc1758* lpc175x ROM=512K RAM=32K RAM1=16K RAM2=16K
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lpc1759* lpc175x ROM=512K RAM=32K RAM1=16K RAM2=16K
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lpc1763* lpc176x ROM=256K RAM=32K RAM1=16K RAM2=16K
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lpc1764* lpc176x ROM=128K RAM=16K RAM1=16K
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lpc1765* lpc176x ROM=256K RAM=32K RAM1=16K RAM2=16K
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lpc1766* lpc176x ROM=256K RAM=32K RAM1=16K RAM2=16K
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lpc1767* lpc176x ROM=512K RAM=32K RAM1=16K RAM2=16K
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lpc1768* lpc176x ROM=512K RAM=32K RAM1=16K RAM2=16K
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lpc1769* lpc176x ROM=512K RAM=32K RAM1=16K RAM2=16K
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lpc1774* lpc177x ROM=128K RAM=32K RAM1=8K
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lpc1776* lpc177x ROM=256K RAM=64K RAM1=16K
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lpc1777* lpc177x ROM=512K RAM=64K RAM1=16K RAM2=16K
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lpc1778* lpc177x ROM=512K RAM=64K RAM1=16K RAM2=16K
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lpc1785* lpc178x ROM=256K RAM=64K RAM1=16K
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lpc1786* lpc178x ROM=256K RAM=64K RAM1=16K
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lpc1787* lpc178x ROM=512K RAM=64K RAM1=16K RAM2=16K
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lpc1788* lpc178x ROM=512K RAM=64K RAM1=16K RAM2=16K
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################################################################################
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# the efm32 chips
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# Zero Gecko
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efm32zg???f4 efm32zg ROM=4K RAM=2K
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efm32zg???f8 efm32zg ROM=8K RAM=2K
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efm32zg???f16 efm32zg ROM=16K RAM=4K
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efm32zg???f32 efm32zg ROM=32K RAM=4K
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# Tiny Gecko
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efm32tg108f4 efm32tg ROM=4K RAM=1K
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efm32tg110f4 efm32tg ROM=4K RAM=2K
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efm32tg???f8 efm32tg ROM=8K RAM=2K
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efm32tg???f16 efm32tg ROM=16K RAM=4K
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efm32tg???f32 efm32tg ROM=32K RAM=4K
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# Gecko
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efm32g200f16 efm32g ROM=16K RAM=8K
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efm32g???f32 efm32g ROM=32K RAM=8K
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efm32g???f64 efm32g ROM=64K RAM=16K
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efm32g???f128 efm32g ROM=128K RAM=16K
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# Large Gecko
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efm32lg???f64 efm32lg ROM=64K RAM=32K
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efm32lg???f128 efm32lg ROM=128K RAM=32K
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efm32lg???f256 efm32lg ROM=256K RAM=32K
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# Giant Gecko
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efm32gg???f512 efm32gg ROM=512K RAM=128K
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efm32gg???f1024 efm32gg ROM=1024K RAM=128K
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# Wonder Gecko
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efm32wg???f64 efm32gg ROM=64K RAM=32K
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efm32wg???f128 efm32gg ROM=128K RAM=32K
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efm32wg???f256 efm32gg ROM=256K RAM=32K
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################################################################################
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# the TI cortex M3 chips
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lm3s101 lm3sandstorm ROM=8K RAM=2K
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lm3s102 lm3sandstorm ROM=8K RAM=2K
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lm3s300 lm3sandstorm ROM=16K RAM=4K
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lm3s301 lm3sandstorm ROM=16K RAM=2K
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lm3s308 lm3sandstorm ROM=16K RAM=4K
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lm3s310 lm3sandstorm ROM=16K RAM=4K
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lm3s315 lm3sandstorm ROM=16K RAM=4K
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lm3s316 lm3sandstorm ROM=16K RAM=4K
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lm3s317 lm3sandstorm ROM=16K RAM=4K
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lm3s328 lm3sandstorm ROM=16K RAM=4K
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lm3s600 lm3sandstorm ROM=32K RAM=8K
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lm3s601 lm3sandstorm ROM=32K RAM=8K
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lm3s608 lm3sandstorm ROM=32K RAM=8K
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lm3s610 lm3sandstorm ROM=32K RAM=8K
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lm3s611 lm3sandstorm ROM=32K RAM=8K
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lm3s612 lm3sandstorm ROM=32K RAM=8K
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lm3s613 lm3sandstorm ROM=32K RAM=8K
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lm3s615 lm3sandstorm ROM=32K RAM=8K
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lm3s617 lm3sandstorm ROM=32K RAM=8K
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lm3s618 lm3sandstorm ROM=32K RAM=8K
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lm3s628 lm3sandstorm ROM=32K RAM=8K
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lm3s800 lm3sandstorm ROM=64K RAM=8K
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lm3s801 lm3sandstorm ROM=64K RAM=8K
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lm3s808 lm3sandstorm ROM=64K RAM=8K
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lm3s811 lm3sandstorm ROM=64K RAM=8K
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lm3s812 lm3sandstorm ROM=64K RAM=8K
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lm3s815 lm3sandstorm ROM=64K RAM=8K
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lm3s817 lm3sandstorm ROM=64K RAM=8K
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lm3s818 lm3sandstorm ROM=64K RAM=8K
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lm3s828 lm3sandstorm ROM=64K RAM=8K
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lm3s1110 lm3fury ROM=64K RAM=16K
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lm3s1133 lm3fury ROM=64K RAM=16K
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lm3s1138 lm3fury ROM=64K RAM=16K
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lm3s1150 lm3fury ROM=64K RAM=16K
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lm3s1162 lm3fury ROM=64K RAM=16K
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lm3s1165 lm3fury ROM=64K RAM=16K
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lm3s1332 lm3fury ROM=96K RAM=16K
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lm3s1435 lm3fury ROM=96K RAM=32K
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lm3s1439 lm3fury ROM=96K RAM=32K
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lm3s1512 lm3fury ROM=96K RAM=64K
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lm3s1538 lm3fury ROM=96K RAM=64K
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lm3s1601 lm3fury ROM=128K RAM=32K
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lm3s1607 lm3fury ROM=128K RAM=32K
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lm3s1608 lm3fury ROM=128K RAM=32K
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lm3s1620 lm3fury ROM=128K RAM=32K
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lm3s8962 lm3fury ROM=256K RAM=64K
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################################################################################
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# the TI cortex R4F chips
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rm46l852* rm46l ROM=1280K RAM=192K
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################################################################################
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################################################################################
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################################################################################
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# the STM32 family groups
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stm32f3ccm stm32f3 CCM_OFF=0x10000000
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stm32f4ccm stm32f4 CCM_OFF=0x10000000
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stm32l1eep stm32l1 EEP_OFF=0x08080000
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################################################################################
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# the lpc family groups
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lpc13u lpc13 USBRAM_OFF=0x20004000
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lpc17[56]x lpc17 RAM1_OFF=0x2007C000 RAM2_OFF=0x20080000
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lpc17[78]x lpc17 RAM1_OFF=0x20000000 RAM2_OFF=0x20040000
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################################################################################
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################################################################################
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################################################################################
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# the STM32 families
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stm32f0 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32f1 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32f2 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32f3 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32f4 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32l1 stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32w stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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stm32t stm32 ROM_OFF=0x08000000 RAM_OFF=0x20000000
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################################################################################
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# the SAM3 families
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sam3a sam3 ROM_OFF=0x00800000 RAM_OFF=0x20000000
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sam3n sam3 ROM_OFF=0x00400000 RAM_OFF=0x20000000
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sam3s sam3 ROM_OFF=0x00400000 RAM_OFF=0x20000000
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sam3u sam3 ROM_OFF=0x00080000 RAM_OFF=0x20000000
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sam3x sam3 ROM_OFF=0x00800000 RAM_OFF=0x20000000
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################################################################################
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# the lpc families
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lpc13 lpc ROM_OFF=0x00000000 RAM_OFF=0x10000000 RAM1_OFF=0x20000000
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lpc17 lpc ROM_OFF=0x00000000 RAM_OFF=0x10000000
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################################################################################
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# the efm32 Gecko families
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efm32zg efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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efm32tg efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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efm32g efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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efm32lg efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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efm32gg efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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efm32wg efm32 ROM_OFF=0x00000000 RAM_OFF=0x20000000 RAM1_OFF=0x10000000
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################################################################################
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# Cortex LM3 families
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lm3fury lm3 ROM_OFF=0x00000000 RAM_OFF=0x20000000
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lm3sandstorm lm3 ROM_OFF=0x00000000 RAM_OFF=0x20000000
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################################################################################
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# Cortex R4F families
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rm46l rm4 ROM_OFF=0x00000000 RAM_OFF=0x08000000 RAM1_OFF=0x08400000
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################################################################################
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################################################################################
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################################################################################
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# the architectures
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stm32 END
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sam3 END
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lpc END
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efm32 END
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lm3 END
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rm4 END
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@ -0,0 +1,179 @@
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/*
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* This file is part of the libopencm3 project.
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*
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||||
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
|
||||
* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/* Generic linker script for all targets using libopencm3. */
|
||||
|
||||
/* Enforce emmition of the vector table. */
|
||||
EXTERN(vector_table)
|
||||
|
||||
/* Define the entry point of the output file. */
|
||||
ENTRY(reset_handler)
|
||||
|
||||
/* Define memory regions. */
|
||||
MEMORY
|
||||
{
|
||||
/* RAM is always used */
|
||||
ram (rwx) : ORIGIN = RAM_OFF, LENGTH = RAM
|
||||
|
||||
#if defined(ROM)
|
||||
rom (rx) : ORIGIN = ROM_OFF, LENGTH = ROM
|
||||
#endif
|
||||
#if defined(ROM2)
|
||||
rom2 (rx) : ORIGIN = ROM2_OFF, LENGTH = ROM2
|
||||
#endif
|
||||
#if defined(RAM1)
|
||||
ram1 (rwx) : ORIGIN = RAM1_OFF, LENGTH = RAM1
|
||||
#endif
|
||||
#if defined(RAM2)
|
||||
ram2 (rwx) : ORIGIN = RAM2_OFF, LENGTH = RAM2
|
||||
#endif
|
||||
#if defined(CCM)
|
||||
ccm (rwx) : ORIGIN = CCM_OFF, LENGTH = CCM
|
||||
#endif
|
||||
#if defined(EEP)
|
||||
eep (r) : ORIGIN = EEP_OFF, LENGTH = EEP
|
||||
#endif
|
||||
#if defined(XSRAM)
|
||||
xsram (rw) : ORIGIN = XSRAM_OFF, LENGTH = XSRAM
|
||||
#endif
|
||||
#if defined(XDRAM)
|
||||
xdram (rw) : ORIGIN = XDRAM_OFF, LENGTH = XDRAM
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Define sections. */
|
||||
SECTIONS
|
||||
{
|
||||
.text : {
|
||||
*(.vectors) /* Vector table */
|
||||
*(.text*) /* Program code */
|
||||
. = ALIGN(4);
|
||||
*(.rodata*) /* Read-only data */
|
||||
. = ALIGN(4);
|
||||
} >rom
|
||||
|
||||
/* C++ Static constructors/destructors, also used for
|
||||
* __attribute__((constructor)) and the likes */
|
||||
.preinit_array : {
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
} >rom
|
||||
.init_array : {
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
} >rom
|
||||
.fini_array : {
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
} >rom
|
||||
|
||||
/*
|
||||
* Another section used by C++ stuff, appears when using newlib with
|
||||
* 64bit (long long) printf support
|
||||
*/
|
||||
.ARM.extab : {
|
||||
*(.ARM.extab*)
|
||||
} >rom
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} >rom
|
||||
|
||||
. = ALIGN(4);
|
||||
_etext = .;
|
||||
|
||||
.data : {
|
||||
_data = .;
|
||||
*(.data*) /* Read-write initialized data */
|
||||
. = ALIGN(4);
|
||||
_edata = .;
|
||||
} >ram AT >rom
|
||||
_data_loadaddr = LOADADDR(.data);
|
||||
|
||||
.bss : {
|
||||
*(.bss*) /* Read-write zero initialized data */
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
_ebss = .;
|
||||
} >ram
|
||||
|
||||
#if defined(EEP)
|
||||
.eep : {
|
||||
*(.eeprom*)
|
||||
. = ALIGN(4);
|
||||
} >eep
|
||||
#endif
|
||||
|
||||
#if defined(CCM)
|
||||
.ccm : {
|
||||
*(.ccmram*)
|
||||
. = ALIGN(4);
|
||||
} >ccm
|
||||
#endif
|
||||
|
||||
#if defined(RAM1)
|
||||
.ram1 : {
|
||||
*(.ram1*)
|
||||
. = ALIGN(4);
|
||||
} >ram1
|
||||
#endif
|
||||
|
||||
#if defined(RAM2)
|
||||
.ram2 : {
|
||||
*(.ram2*)
|
||||
. = ALIGN(4);
|
||||
} >ram2
|
||||
#endif
|
||||
|
||||
#if defined(XSRAM)
|
||||
.xsram : {
|
||||
*(.xsram*)
|
||||
. = ALIGN(4);
|
||||
} >xsram
|
||||
#endif
|
||||
|
||||
#if defined(XDRAM)
|
||||
.xdram : {
|
||||
*(.xdram*)
|
||||
. = ALIGN(4);
|
||||
} >xdram
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The .eh_frame section appears to be used for C++ exception handling.
|
||||
* You may need to fix this if you're using C++.
|
||||
*/
|
||||
/DISCARD/ : { *(.eh_frame) }
|
||||
|
||||
. = ALIGN(4);
|
||||
end = .;
|
||||
}
|
||||
|
||||
PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
# This program converts chip name to the series of definitions for make of
|
||||
# automatic linker script.
|
||||
#
|
||||
# Copyright (C) 2013 Frantisek Burian <Bufran@seznam.cz>
|
||||
# Copyright (C) 2013 Werner Almesberger <wpwrak>
|
||||
#
|
||||
|
||||
BEGIN {
|
||||
PAT = tolower(PAT);
|
||||
}
|
||||
!/^#/{
|
||||
tmp = "^"$1"$";
|
||||
gsub(/?/, ".", tmp);
|
||||
gsub(/*/, ".*", tmp);
|
||||
gsub(/+/, ".+", tmp);
|
||||
tolower(tmp);
|
||||
|
||||
if (PAT ~ tmp) {
|
||||
if ($2 != "+")
|
||||
PAT=$2;
|
||||
$1="";
|
||||
$2="";
|
||||
for (i = 3; i <= NF; i = i + 1)
|
||||
$i = "-D"$i;
|
||||
print;
|
||||
if (PAT=="END") exit;
|
||||
}
|
||||
}
|
Loading…
Reference in New Issue