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Fix trivial typo INTERRPUT -> INTERRUPT.

This commit is contained in:
Roger Light 2012-12-16 10:07:04 +00:00
parent a4a4255555
commit b9180a81d8
2 changed files with 12 additions and 12 deletions
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22
include/libopencm3/lpc17xx/gpio.h
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@ -110,27 +110,27 @@
/* GPIO interrupt register map */ /* GPIO interrupt register map */
/* Interrupt enable rising edge */ /* Interrupt enable rising edge */
#define GPIO0_IER MMIO32(GPIOINTERRPUT_BASE + 0x90) #define GPIO0_IER MMIO32(GPIOINTERRUPT_BASE + 0x90)
#define GPIO2_IER MMIO32(GPIOINTERRPUT_BASE + 0xB0) #define GPIO2_IER MMIO32(GPIOINTERRUPT_BASE + 0xB0)
/* Interrupt enable falling edge */ /* Interrupt enable falling edge */
#define GPIO0_IEF MMIO32(GPIOINTERRPUT_BASE + 0x94) #define GPIO0_IEF MMIO32(GPIOINTERRUPT_BASE + 0x94)
#define GPIO2_IEF MMIO32(GPIOINTERRPUT_BASE + 0xB4) #define GPIO2_IEF MMIO32(GPIOINTERRUPT_BASE + 0xB4)
/* Interrupt status rising edge */ /* Interrupt status rising edge */
#define GPIO0_ISR MMIO32(GPIOINTERRPUT_BASE + 0x84) #define GPIO0_ISR MMIO32(GPIOINTERRUPT_BASE + 0x84)
#define GPIO2_ISR MMIO32(GPIOINTERRPUT_BASE + 0xA4) #define GPIO2_ISR MMIO32(GPIOINTERRUPT_BASE + 0xA4)
/* Interrupt status falling edge */ /* Interrupt status falling edge */
#define GPIO0_ISF MMIO32(GPIOINTERRPUT_BASE + 0x88) #define GPIO0_ISF MMIO32(GPIOINTERRUPT_BASE + 0x88)
#define GPIO2_ISF MMIO32(GPIOINTERRPUT_BASE + 0xA8) #define GPIO2_ISF MMIO32(GPIOINTERRUPT_BASE + 0xA8)
/* Interrupt clear */ /* Interrupt clear */
#define GPIO0_IC MMIO32(GPIOINTERRPUT_BASE + 0x8C) #define GPIO0_IC MMIO32(GPIOINTERRUPT_BASE + 0x8C)
#define GPIO1_IC MMIO32(GPIOINTERRPUT_BASE + 0xAC) #define GPIO1_IC MMIO32(GPIOINTERRUPT_BASE + 0xAC)
/* Overall interrupt status */ /* Overall interrupt status */
#define GPIO_IS MMIO32(GPIOINTERRPUT_BASE + 0x80) #define GPIO_IS MMIO32(GPIOINTERRUPT_BASE + 0x80)
BEGIN_DECLS BEGIN_DECLS

2
include/libopencm3/lpc17xx/memorymap.h
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@ -42,7 +42,7 @@
#define I2C0_BASE (PERIPH_BASE_APB0 + 0x1c000) #define I2C0_BASE (PERIPH_BASE_APB0 + 0x1c000)
#define SPI_BASE (PERIPH_BASE_APB0 + 0x20000) #define SPI_BASE (PERIPH_BASE_APB0 + 0x20000)
#define RTC_BASE (PERIPH_BASE_APB0 + 0x24000) #define RTC_BASE (PERIPH_BASE_APB0 + 0x24000)
#define GPIOINTERRPUT_BASE (PERIPH_BASE_APB0 + 0x28000) #define GPIOINTERRUPT_BASE (PERIPH_BASE_APB0 + 0x28000)
#define PINCONNECT_BASE (PERIPH_BASE_APB0 + 0x2c000) #define PINCONNECT_BASE (PERIPH_BASE_APB0 + 0x2c000)
#define SSP1_BASE (PERIPH_BASE_APB0 + 0x30000) #define SSP1_BASE (PERIPH_BASE_APB0 + 0x30000)
#define ADC_BASE (PERIPH_BASE_APB0 + 0x34000) #define ADC_BASE (PERIPH_BASE_APB0 + 0x34000)