[CM0] Disabled sync for LPC43xx/M0.
We are currently using the same code for CM0 CM3 and CM4 cores. This patch is a bodge that disables sync on the LPC43xx/M0 core, it would be nicer to probably implement a dispatch system similar to the one used in stm32 peripheral support so that we can accomodate the different features of the cortex cores. I (esden) assume we will run into more incompatibilities in the future between the cortex cores.
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@ -19,6 +19,10 @@
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#include <libopencm3/cm3/sync.h>
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#if defined(LPC43XX_M0)
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#warning "Currently sync is not supported on Cortex-M0"
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#else
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uint32_t __ldrex(volatile uint32_t *addr)
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{
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uint32_t res;
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@ -66,3 +70,4 @@ void mutex_unlock(mutex_t *m)
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*m = MUTEX_UNLOCKED;
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}
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#endif
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