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[Style] Stylefix sweep over the whole codebase.

This commit is contained in:
Piotr Esden-Tempski 2015-12-14 22:57:15 +01:00
parent 1f6fd11dd9
commit b1049f9a6f
39 changed files with 445 additions and 359 deletions
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12
include/libopencm3/sam/3s/smc.h
View File

@ -33,16 +33,20 @@
/* --- Static Memory Controller (SMC) registers ---------------------------- */
/* Setup Register */
#define SMC_SETUP(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) + 0x00)
#define SMC_SETUP(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) \
+ 0x00)
/* Pulse Register */
#define SMC_PULSE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) + 0x04)
#define SMC_PULSE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) \
+ 0x04)
/* Cycle Register */
#define SMC_CYCLE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) + 0x08)
#define SMC_CYCLE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) \
+ 0x08)
/* Mode Register */
#define SMC_MODE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) + 0x0C)
#define SMC_MODE(CS_number) MMIO32(SMC_BASE + 0x10*(CS_number) \
+ 0x0C)
/* Off Chip Memory Scrambling Mode Register */
#define SMC_OCMS MMIO32(SMC_BASE + 0x80)

27
include/libopencm3/sam/common/smc_common_3a3u3x.h
View File

@ -117,19 +117,24 @@
#define SMC_ECC_PR15 MMIO32(SMC_BASE + 0x6C)
/* Setup Register */
#define SMC_SETUP(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) + 0x70)
#define SMC_SETUP(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) \
+ 0x70)
/* Pulse Register */
#define SMC_PULSE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) + 0x74)
#define SMC_PULSE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) \
+ 0x74)
/* Cycle Register */
#define SMC_CYCLE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) + 0x78)
#define SMC_CYCLE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) \
+ 0x78)
/* Timings Register */
#define SMC_TIMINGS(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) + 0x7C)
#define SMC_TIMINGS(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) \
+ 0x7C)
/* Mode Register */
#define SMC_MODE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) + 0x80)
#define SMC_MODE(CS_number) MMIO32(SMC_BASE + 0x14*(CS_number) \
+ 0x80)
/* Off Chip Memory Scrambling Mode Register */
#define SMC_OCMS MMIO32(SMC_BASE + 0x110)
@ -374,10 +379,14 @@
#define SMC_ECC_MD_ECC_PAGESIZE_MASK (0x03 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
/* ECC Page Size Values */
#define SMC_ECC_MD_ECC_PAGESIZE_PS512_16 (0x00 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS1024_32 (0x01 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 (0x02 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS4096_128 (0x03 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS512_16 \
(0x00 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS1024_32 \
(0x01 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 \
(0x02 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
#define SMC_ECC_MD_ECC_PAGESIZE_PS4096_128 \
(0x03 << SMC_ECC_MD_ECC_PAGESIZE_SHIFT)
/* --- SMC ECC Status Register 1 (SMC_ECC_SR1) ----------------------------- */

12
include/libopencm3/stm32/f4/fmc.h
View File

@ -144,10 +144,10 @@ error "This file should not be included directly, it is included with fsmc.h"
* out those bits after you have computed values for CR2 and
* TR2 and put them into CR1 and TR1
*/
#define FMC_SDTR_DNC_MASK ( FMC_SDTR_TRP_MASK| FMC_SDTR_TRC_MASK )
#define FMC_SDCR_DNC_MASK ( FMC_SDCR_SDCLK_MASK |\
FMC_SDCR_RPIPE_MASK |\
FMC_SDCR_RBURST )
#define FMC_SDTR_DNC_MASK (FMC_SDTR_TRP_MASK | FMC_SDTR_TRC_MASK)
#define FMC_SDCR_DNC_MASK (FMC_SDCR_SDCLK_MASK | \
FMC_SDCR_RPIPE_MASK | \
FMC_SDCR_RBURST)
/* --- FMC_SDCMR values --------------------------------------------------- */
@ -240,7 +240,9 @@ enum fmc_sdram_command { SDRAM_CLK_CONF, SDRAM_NORMAL, SDRAM_PALL,
SDRAM_AUTO_REFRESH, SDRAM_LOAD_MODE,
SDRAM_SELF_REFRESH, SDRAM_POWER_DOWN };
/* Send an array of timing parameters (indices above) to create SDTR register value */
/* Send an array of timing parameters (indices above) to create SDTR register
* value
*/
uint32_t sdram_timing(struct sdram_timing *t);
void sdram_command(enum fmc_sdram_bank bank, enum fmc_sdram_command cmd,
int autorefresh, int modereg);

10
include/libopencm3/stm32/otg_common.h
View File

@ -443,12 +443,12 @@
#define OTG_HCINT_FRMOR (1 << 9)
#define OTG_HCINT_BBERR (1 << 8)
#define OTG_HCINT_TXERR (1 << 7)
// Note: OTG_HCINT_NYET: Only in OTG_HS
/* Note: OTG_HCINT_NYET: Only in OTG_HS */
#define OTG_HCINT_NYET (1 << 6)
#define OTG_HCINT_ACK (1 << 5)
#define OTG_HCINT_NAK (1 << 4)
#define OTG_HCINT_STALL (1 << 3)
// Note: OTG_HCINT_AHBERR: Only in OTG_HS
/* Note: OTG_HCINT_AHBERR: Only in OTG_HS */
#define OTG_HCINT_AHBERR (1 << 2)
#define OTG_HCINT_CHH (1 << 1)
#define OTG_HCINT_XFRC (1 << 0)
@ -459,18 +459,18 @@
#define OTG_HCINTMSK_FRMORM (1 << 9)
#define OTG_HCINTMSK_BBERRM (1 << 8)
#define OTG_HCINTMSK_TXERRM (1 << 7)
// Note: OTG_HCINTMSK_NYET: Only in OTG_HS
/* Note: OTG_HCINTMSK_NYET: Only in OTG_HS */
#define OTG_HCINTMSK_NYET (1 << 6)
#define OTG_HCINTMSK_ACKM (1 << 5)
#define OTG_HCINTMSK_NAKM (1 << 4)
#define OTG_HCINTMSK_STALLM (1 << 3)
// Note: OTG_HCINTMSK_AHBERR: Only in OTG_HS
/* Note: OTG_HCINTMSK_AHBERR: Only in OTG_HS */
#define OTG_HCINTMSK_AHBERR (1 << 2)
#define OTG_HCINTMSK_CHHM (1 << 1)
#define OTG_HCINTMSK_XFRCM (1 << 0)
/* OTG Host channel-x transfer size register (OTG_HCTSIZx) */
// Note: OTG_HCTSIZ_DOPING: Only in OTG_HS
/* Note: OTG_HCTSIZ_DOPING: Only in OTG_HS */
#define OTG_HCTSIZ_DOPING (1 << 31)
#define OTG_HCTSIZ_DPID_DATA0 (0x0 << 29)
#define OTG_HCTSIZ_DPID_DATA1 (0x2 << 29)

6
include/libopencm3/usb/midi.h
View File

@ -144,9 +144,9 @@ struct usb_midi_element_descriptor_tail {
uint8_t bInTerminalLink;
uint8_t bOutTerminalLink;
uint8_t bElCapsSize;
uint16_t bmElementCaps; /* host cannot assume this is 16-bit but
device can (since highest defined bitmap
value in v1.0 is bit 11) */
uint16_t bmElementCaps; /* host cannot assume this is 16-bit but device
can (since highest defined bitmap value in
v1.0 is bit 11) */
uint8_t iElement;
} __attribute__((packed));

6
include/libopencm3/usb/usbd.h
View File

@ -110,7 +110,8 @@ typedef int (*usbd_control_callback)(usbd_device *usbd_dev,
struct usb_setup_data *req, uint8_t **buf, uint16_t *len,
usbd_control_complete_callback *complete);
typedef void (*usbd_set_config_callback)(usbd_device *usbd_dev, uint16_t wValue);
typedef void (*usbd_set_config_callback)(usbd_device *usbd_dev,
uint16_t wValue);
typedef void (*usbd_set_altsetting_callback)(usbd_device *usbd_dev,
uint16_t wIndex, uint16_t wValue);
@ -120,7 +121,8 @@ typedef void (*usbd_endpoint_callback)(usbd_device *usbd_dev, uint8_t ep);
/* <usb_control.c> */
/** Registers a control callback.
*
* The specified callback will be called if (type == (bmRequestType & type_mask))
* The specified callback will be called if (type == (bmRequestType
* & type_mask))
* @param type Handled request type
* @param type_mask Mask to apply before matching request type
* @return 0 if successful

2
lib/stm32/common/spi_common_all.c
View File

@ -730,7 +730,7 @@ Mode | CPOL | CPHA
void spi_set_standard_mode(uint32_t spi, uint8_t mode)
{
if(mode > 3) {
if (mode > 3) {
return;
}

6
lib/stm32/common/st_usbfs_core.h
View File

@ -44,8 +44,10 @@ void st_usbfs_endpoints_reset(usbd_device *usbd_dev);
void st_usbfs_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall);
uint8_t st_usbfs_ep_stall_get(usbd_device *usbd_dev, uint8_t addr);
void st_usbfs_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak);
uint16_t st_usbfs_ep_write_packet(usbd_device *usbd_dev, uint8_t addr, const void *buf, uint16_t len);
uint16_t st_usbfs_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf, uint16_t len);
uint16_t st_usbfs_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
const void *buf, uint16_t len);
uint16_t st_usbfs_ep_read_packet(usbd_device *usbd_dev, uint8_t addr,
void *buf, uint16_t len);
void st_usbfs_poll(usbd_device *usbd_dev);
/* These must be implemented by the device specific driver */

4
lib/stm32/f0/flash.c
View File

@ -76,10 +76,10 @@ error, bit 5: end of operation.
uint32_t flash_get_status_flags(void)
{
return (FLASH_SR & (FLASH_SR_PGERR |
return FLASH_SR & (FLASH_SR_PGERR |
FLASH_SR_EOP |
FLASH_SR_WRPRTERR |
FLASH_SR_BSY));
FLASH_SR_BSY);
}
/*---------------------------------------------------------------------------*/

37
lib/stm32/f1/flash.c
View File

@ -128,8 +128,9 @@ void flash_lock_upper(void)
void flash_clear_pgerr_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_PGERR;
}
}
/*---------------------------------------------------------------------------*/
@ -139,8 +140,9 @@ void flash_clear_pgerr_flag_upper(void)
void flash_clear_eop_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_EOP;
}
}
/*---------------------------------------------------------------------------*/
@ -150,8 +152,9 @@ void flash_clear_eop_flag_upper(void)
void flash_clear_wrprterr_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 |= FLASH_SR_WRPRTERR;
}
}
/*---------------------------------------------------------------------------*/
@ -161,8 +164,9 @@ void flash_clear_wrprterr_flag_upper(void)
void flash_clear_bsy_flag_upper(void)
{
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
FLASH_SR2 &= ~FLASH_SR_BSY;
}
}
/*---------------------------------------------------------------------------*/
@ -204,11 +208,13 @@ uint32_t flash_get_status_flags(void)
FLASH_SR_EOP |
FLASH_SR_WRPRTERR |
FLASH_SR_BSY));
if (MEMORY_SIZE_REG > 512)
if (MEMORY_SIZE_REG > 512) {
flags |= (FLASH_SR2 & (FLASH_SR_PGERR |
FLASH_SR_EOP |
FLASH_SR_WRPRTERR |
FLASH_SR_BSY));
}
return flags;
}
@ -229,17 +235,21 @@ void flash_program_half_word(uint32_t address, uint16_t data)
{
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 |= FLASH_CR_PG;
else FLASH_CR |= FLASH_CR_PG;
} else {
FLASH_CR |= FLASH_CR_PG;
}
MMIO16(address) = data;
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 &= ~FLASH_CR_PG;
else FLASH_CR &= ~FLASH_CR_PG;
} else {
FLASH_CR &= ~FLASH_CR_PG;
}
}
/*---------------------------------------------------------------------------*/
@ -259,7 +269,8 @@ void flash_erase_page(uint32_t page_address)
{
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000)) {
if ((MEMORY_SIZE_REG > 512)
&& (page_address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 |= FLASH_CR_PER;
FLASH_AR2 = page_address;
FLASH_CR2 |= FLASH_CR_STRT;
@ -271,10 +282,12 @@ void flash_erase_page(uint32_t page_address)
flash_wait_for_last_operation();
if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000))
if ((MEMORY_SIZE_REG > 512)
&& (page_address >= FLASH_BASE+0x00080000)) {
FLASH_CR2 &= ~FLASH_CR_PER;
else
} else {
FLASH_CR &= ~FLASH_CR_PER;
}
}
/*---------------------------------------------------------------------------*/

10
lib/stm32/f1/rcc.c
View File

@ -638,10 +638,11 @@ The prescale factor can be set to 1 (no prescale) for use when the PLL clock is
void rcc_set_usbpre(uint32_t usbpre)
{
if (usbpre)
if (usbpre) {
RCC_CFGR |= RCC_CFGR_USBPRE;
else
} else {
RCC_CFGR &= ~RCC_CFGR_USBPRE;
}
}
void rcc_set_prediv1(uint32_t prediv)
@ -658,10 +659,11 @@ void rcc_set_prediv2(uint32_t prediv)
void rcc_set_prediv1_source(uint32_t rccsrc)
{
if (rccsrc)
if (rccsrc) {
RCC_CFGR2 |= RCC_CFGR2_PREDIV1SRC;
else
} else {
RCC_CFGR2 &= ~RCC_CFGR2_PREDIV1SRC;
}
}
/*---------------------------------------------------------------------------*/

6
lib/stm32/f3/rcc.c
View File

@ -475,8 +475,10 @@ void rcc_usb_prescale_1(void)
void rcc_adc_prescale(uint32_t prescale1, uint32_t prescale2)
{
uint32_t clear_mask = (RCC_CFGR2_ADCxPRES_MASK << RCC_CFGR2_ADC12PRES_SHIFT) |
(RCC_CFGR2_ADCxPRES_MASK << RCC_CFGR2_ADC34PRES_SHIFT);
uint32_t clear_mask = (RCC_CFGR2_ADCxPRES_MASK
<< RCC_CFGR2_ADC12PRES_SHIFT)
| (RCC_CFGR2_ADCxPRES_MASK
<< RCC_CFGR2_ADC34PRES_SHIFT);
uint32_t set = (prescale1 << RCC_CFGR2_ADC12PRES_SHIFT) |
(prescale2 << RCC_CFGR2_ADC34PRES_SHIFT);
RCC_CFGR2 &= ~(clear_mask);

2
lib/stm32/f4/fmc.c
View File

@ -92,7 +92,7 @@ sdram_command(enum fmc_sdram_bank bank,
}
/* Wait for the next chance to talk to the controller */
while (FMC_SDSR & FMC_SDSR_BUSY) ;
while (FMC_SDSR & FMC_SDSR_BUSY);
/* Send the next command */
FMC_SDCMR = tmp_reg;

18
lib/stm32/l0/rcc.c
View File

@ -293,14 +293,16 @@ void rcc_wait_for_osc_ready(enum rcc_osc osc)
/*---------------------------------------------------------------------------*/
/** @brief RCC Set HSI48 clock source to the RC48 (CRS)
*/
void rcc_set_hsi48_source_rc48(void) {
void rcc_set_hsi48_source_rc48(void)
{
RCC_CCIPR |= RCC_CCIPR_HSI48SEL;
}
/*---------------------------------------------------------------------------*/
/** @brief RCC Set HSI48 clock source to the PLL
*/
void rcc_set_hsi48_source_pll(void) {
void rcc_set_hsi48_source_pll(void)
{
RCC_CCIPR &= ~RCC_CCIPR_HSI48SEL;
}
@ -343,7 +345,8 @@ void rcc_set_sysclk_source(enum rcc_osc osc)
void rcc_set_pll_multiplier(uint32_t factor)
{
uint32_t reg = RCC_CFGR & ~(RCC_CFGR_PLLMUL_MASK<<RCC_CFGR_PLLMUL_SHIFT);
uint32_t reg = RCC_CFGR
& ~(RCC_CFGR_PLLMUL_MASK << RCC_CFGR_PLLMUL_SHIFT);
RCC_CFGR = reg | (factor << RCC_CFGR_PLLMUL_SHIFT);
}
@ -358,7 +361,8 @@ void rcc_set_pll_multiplier(uint32_t factor)
void rcc_set_pll_divider(uint32_t factor)
{
uint32_t reg = RCC_CFGR & ~(RCC_CFGR_PLLDIV_MASK<<RCC_CFGR_PLLDIV_SHIFT);
uint32_t reg = RCC_CFGR
& ~(RCC_CFGR_PLLDIV_MASK << RCC_CFGR_PLLDIV_SHIFT);
RCC_CFGR = reg | (factor << RCC_CFGR_PLLDIV_SHIFT);
}
@ -372,7 +376,8 @@ void rcc_set_pll_divider(uint32_t factor)
void rcc_set_ppre1(uint32_t ppre)
{
uint32_t reg = RCC_CFGR & ~(RCC_CFGR_PPRE1_MASK << RCC_CFGR_PPRE1_SHIFT);
uint32_t reg = RCC_CFGR
& ~(RCC_CFGR_PPRE1_MASK << RCC_CFGR_PPRE1_SHIFT);
RCC_CFGR = reg | (ppre << RCC_CFGR_PPRE1_SHIFT);
}
@ -386,7 +391,8 @@ void rcc_set_ppre1(uint32_t ppre)
void rcc_set_ppre2(uint32_t ppre)
{
uint32_t reg = RCC_CFGR & ~(RCC_CFGR_PPRE2_MASK << RCC_CFGR_PPRE2_SHIFT);
uint32_t reg = RCC_CFGR
& ~(RCC_CFGR_PPRE2_MASK << RCC_CFGR_PPRE2_SHIFT);
RCC_CFGR = reg | (ppre << RCC_CFGR_PPRE2_SHIFT);
}

32
lib/stm32/l1/flash.c
View File

@ -121,39 +121,46 @@ void flash_set_ws(uint32_t ws)
FLASH_ACR = reg32;
}
void flash_unlock_pecr(void) {
void flash_unlock_pecr(void)
{
FLASH_PEKEYR = FLASH_PEKEYR_PEKEY1;
FLASH_PEKEYR = FLASH_PEKEYR_PEKEY2;
}
void flash_lock_pecr(void) {
void flash_lock_pecr(void)
{
FLASH_PECR |= FLASH_PECR_PELOCK;
}
void flash_unlock_progmem(void) {
void flash_unlock_progmem(void)
{
flash_unlock_pecr();
FLASH_PRGKEYR = FLASH_PRGKEYR_PRGKEY1;
FLASH_PRGKEYR = FLASH_PRGKEYR_PRGKEY2;
}
void flash_lock_progmem(void) {
void flash_lock_progmem(void)
{
FLASH_PECR |= FLASH_PECR_PRGLOCK;
}
void flash_unlock_option_bytes(void) {
void flash_unlock_option_bytes(void)
{
flash_unlock_pecr();
FLASH_OPTKEYR = FLASH_OPTKEYR_OPTKEY1;
FLASH_OPTKEYR = FLASH_OPTKEYR_OPTKEY2;
}
void flash_lock_option_bytes(void) {
void flash_lock_option_bytes(void)
{
FLASH_PECR |= FLASH_PECR_OPTLOCK;
}
/** @brief Unlock all segments of flash
*
*/
void flash_unlock(void) {
void flash_unlock(void)
{
flash_unlock_pecr();
flash_unlock_progmem();
flash_unlock_option_bytes();
@ -162,7 +169,8 @@ void flash_unlock(void) {
/** @brief Lock all segments of flash
*
*/
void flash_lock(void) {
void flash_lock(void)
{
flash_lock_option_bytes();
flash_lock_progmem();
flash_lock_pecr();
@ -173,7 +181,8 @@ void flash_lock(void) {
* @param address assumed to be in the eeprom space, no checking
* @param data word to write
*/
void eeprom_program_word(uint32_t address, uint32_t data) {
void eeprom_program_word(uint32_t address, uint32_t data)
{
flash_unlock_pecr();
/* erase only if needed */
FLASH_PECR &= ~FLASH_PECR_FTDW;
@ -183,8 +192,9 @@ void eeprom_program_word(uint32_t address, uint32_t data) {
/** @brief Write a block of words to eeprom
*
* Writes a block of words to EEPROM at the requested address, erasing if necessary,
* and locking afterwards. Only wordwise writing is safe for writing any value
* Writes a block of words to EEPROM at the requested address, erasing if
* necessary, and locking afterwards. Only wordwise writing is safe for
* writing any value
*
* @param[in] address must point to EEPROM space, no checking!
* @param[in] data pointer to data to write

6
lib/usb/usb_control.c
View File

@ -59,7 +59,8 @@ static void stall_transaction(usbd_device *usbd_dev)
* @param ep_size
* @return
*/
static bool needs_zlp(uint16_t len, uint16_t wLength, uint8_t ep_size) {
static bool needs_zlp(uint16_t len, uint16_t wLength, uint8_t ep_size)
{
if (len < wLength) {
if (len && (len % ep_size == 0)) {
return true;
@ -109,7 +110,8 @@ static void usb_control_send_chunk(usbd_device *usbd_dev)
usbd_dev->control_state.ctrl_len);
usbd_dev->control_state.state =
usbd_dev->control_state.needs_zlp ? DATA_IN : LAST_DATA_IN;
usbd_dev->control_state.needs_zlp ?
DATA_IN : LAST_DATA_IN;
usbd_dev->control_state.needs_zlp = false;
usbd_dev->control_state.ctrl_len = 0;
usbd_dev->control_state.ctrl_buf = NULL;

5
lib/usb/usb_efm32lg.c
View File

@ -51,7 +51,7 @@ static usbd_device *efm32lg_usbd_init(void)
CMU_CMD = CMU_CMD_USBCCLKSEL_HFCLKNODIV;
/* wait till clock not selected */
while(!(CMU_STATUS & CMU_STATUS_USBCHFCLKSEL));
while (!(CMU_STATUS & CMU_STATUS_USBCHFCLKSEL));
USB_GINTSTS = USB_GINTSTS_MMIS;
@ -179,7 +179,8 @@ static void efm32lg_endpoints_reset(usbd_device *usbd_dev)
usbd_dev->fifo_mem_top = usbd_dev->fifo_mem_top_ep0;
}
static void efm32lg_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)
static void efm32lg_ep_stall_set(usbd_device *usbd_dev, uint8_t addr,
uint8_t stall)
{
(void)usbd_dev;
if (addr == 0) {

3
lib/usb/usb_fx07_common.c
View File

@ -132,7 +132,8 @@ void stm32fx07_endpoints_reset(usbd_device *usbd_dev)
}
/* Flush all tx/rx fifos */
REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL | OTG_GRSTCTL_RXFFLSH;
REBASE(OTG_GRSTCTL) = OTG_GRSTCTL_TXFFLSH | OTG_GRSTCTL_TXFNUM_ALL
| OTG_GRSTCTL_RXFFLSH;
}
void stm32fx07_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)

53
lib/usb/usb_msc.c
View File

@ -153,8 +153,9 @@ struct usb_msc_trans {
uint32_t bytes_to_read;
uint32_t bytes_to_write;
uint32_t byte_count; /* Either read until equal to bytes_to_read or
write until equal to bytes_to_write. */
uint32_t byte_count; /* Either read until equal to
bytes_to_read or write until equal
to bytes_to_write. */
uint32_t lba_start;
uint32_t block_count;
uint32_t current_block;
@ -288,7 +289,8 @@ static void scsi_write_6(usbd_mass_storage *ms,
buf = get_cbw_buf(trans);
trans->lba_start = ((0x1f & buf[1]) << 16) | (buf[2] << 8) | buf[3];
trans->lba_start = ((0x1f & buf[1]) << 16)
| (buf[2] << 8) | buf[3];
trans->block_count = buf[4];
trans->current_block = 0;
@ -325,7 +327,8 @@ static void scsi_read_10(usbd_mass_storage *ms,
buf = get_cbw_buf(trans);
trans->lba_start = (buf[2] << 24) | (buf[3] << 16) | (buf[4] << 8) | buf[5];
trans->lba_start = (buf[2] << 24) | (buf[3] << 16)
| (buf[4] << 8) | buf[5];
trans->block_count = (buf[7] << 8) | buf[8];
/* TODO: Check the lba & block_count for range. */
@ -384,7 +387,8 @@ static void scsi_request_sense(usbd_mass_storage *ms,
buf = &trans->cbw.cbw.CBWCB[0];
trans->bytes_to_write = buf[4]; /* allocation length */
memcpy(trans->msd_buf, _spc3_request_sense, sizeof(_spc3_request_sense));
memcpy(trans->msd_buf, _spc3_request_sense,
sizeof(_spc3_request_sense));
trans->msd_buf[2] = ms->sense.key;
trans->msd_buf[12] = ms->sense.asc;
@ -445,7 +449,8 @@ static void scsi_inquiry(usbd_mass_storage *ms,
if (0 == evpd) {
size_t len;
trans->bytes_to_write = sizeof(_spc3_inquiry_response);
memcpy(trans->msd_buf, _spc3_inquiry_response, sizeof(_spc3_inquiry_response));
memcpy(trans->msd_buf, _spc3_inquiry_response,
sizeof(_spc3_inquiry_response));
len = strlen(ms->vendor_id);
len = MIN(len, 8);
@ -457,9 +462,11 @@ static void scsi_inquiry(usbd_mass_storage *ms,
len = strlen(ms->product_revision_level);
len = MIN(len, 4);
memcpy(&trans->msd_buf[32], ms->product_revision_level, len);
memcpy(&trans->msd_buf[32], ms->product_revision_level,
len);
trans->csw.csw.dCSWDataResidue = sizeof(_spc3_inquiry_response);
trans->csw.csw.dCSWDataResidue =
sizeof(_spc3_inquiry_response);
set_sbc_status_good(ms);
} else {
@ -564,7 +571,7 @@ static void msc_data_rx_cb(usbd_device *usbd_dev, uint8_t ep)
if (trans->byte_count < trans->bytes_to_read) {
if (0 < trans->block_count) {
if ((0 == trans->byte_count) && (NULL != ms->lock)){
if ((0 == trans->byte_count) && (NULL != ms->lock)) {
(*ms->lock)();
}
}
@ -580,7 +587,8 @@ static void msc_data_rx_cb(usbd_device *usbd_dev, uint8_t ep)
uint32_t lba;
lba = trans->lba_start + trans->current_block;
if (0 != (*ms->write_block)(lba, trans->msd_buf)) {
if (0 != (*ms->write_block)(lba,
trans->msd_buf)) {
/* Error */
}
trans->current_block++;
@ -596,7 +604,8 @@ static void msc_data_rx_cb(usbd_device *usbd_dev, uint8_t ep)
uint32_t lba;
lba = trans->lba_start + trans->current_block;
if (0 != (*ms->read_block)(lba, trans->msd_buf)) {
if (0 != (*ms->read_block)(lba,
trans->msd_buf)) {
/* Error */
}
trans->current_block++;
@ -614,12 +623,13 @@ static void msc_data_rx_cb(usbd_device *usbd_dev, uint8_t ep)
uint32_t lba;
lba = trans->lba_start + trans->current_block;
if (0 != (*ms->write_block)(lba, trans->msd_buf)) {
if (0 != (*ms->write_block)(lba,
trans->msd_buf)) {
/* Error */
}
trans->current_block = 0;
if (NULL != ms->unlock){
if (NULL != ms->unlock) {
(*ms->unlock)();
}
}
@ -633,7 +643,8 @@ static void msc_data_rx_cb(usbd_device *usbd_dev, uint8_t ep)
if (0 < left) {
max_len = MIN(ms->ep_out_size, left);
p = &trans->csw.buf[trans->csw_sent];
len = usbd_ep_write_packet(usbd_dev, ms->ep_in, p, max_len);
len = usbd_ep_write_packet(usbd_dev, ms->ep_in, p,
max_len);
trans->csw_sent += len;
}
}
@ -656,7 +667,8 @@ static void msc_data_tx_cb(usbd_device *usbd_dev, uint8_t ep)
uint32_t lba;
lba = trans->lba_start + trans->current_block;
if (0 != (*ms->read_block)(lba, trans->msd_buf)) {
if (0 != (*ms->read_block)(lba,
trans->msd_buf)) {
/* Error */
}
trans->current_block++;
@ -672,7 +684,7 @@ static void msc_data_tx_cb(usbd_device *usbd_dev, uint8_t ep)
if (0 < trans->block_count) {
if (trans->current_block == trans->block_count) {
trans->current_block = 0;
if (NULL != ms->unlock){
if (NULL != ms->unlock) {
(*ms->unlock)();
}
}
@ -707,7 +719,8 @@ static void msc_data_tx_cb(usbd_device *usbd_dev, uint8_t ep)
* interface.
*/
static int msc_control_request(usbd_device *usbd_dev,
struct usb_setup_data *req, uint8_t **buf, uint16_t *len,
struct usb_setup_data *req, uint8_t **buf,
uint16_t *len,
usbd_control_complete_callback *complete)
{
(void)complete;
@ -777,8 +790,10 @@ usbd_mass_storage *usb_msc_init(usbd_device *usbd_dev,
const char *product_id,
const char *product_revision_level,
const uint32_t block_count,
int (*read_block)(uint32_t lba, uint8_t *copy_to),
int (*write_block)(uint32_t lba, const uint8_t *copy_from))
int (*read_block)(uint32_t lba,
uint8_t *copy_to),
int (*write_block)(uint32_t lba,
const uint8_t *copy_from))
{
_mass_storage.usbd_dev = usbd_dev;
_mass_storage.ep_in = ep_in;

20
lib/usb/usb_standard.c
View File

@ -45,8 +45,9 @@ int usbd_register_set_config_callback(usbd_device *usbd_dev,
int i;
for (i = 0; i < MAX_USER_SET_CONFIG_CALLBACK; i++) {
if (usbd_dev->user_callback_set_config[i])
if (usbd_dev->user_callback_set_config[i]) {
continue;
}
usbd_dev->user_callback_set_config[i] = callback;
return 0;
@ -253,9 +254,10 @@ static int usb_standard_set_configuration(usbd_device *usbd_dev,
(void)buf;
(void)len;
if(req->wValue > 0) {
if (req->wValue > 0) {
for (i = 0; i < usbd_dev->desc->bNumConfigurations; i++) {
if (req->wValue == usbd_dev->config[i].bConfigurationValue) {
if (req->wValue
== usbd_dev->config[i].bConfigurationValue) {
found_index = i;
break;
}
@ -310,7 +312,8 @@ static int usb_standard_get_configuration(usbd_device *usbd_dev,
if (*len > 1) {
*len = 1;
}
const struct usb_config_descriptor *cfg = &usbd_dev->config[usbd_dev->current_config - 1];
const struct usb_config_descriptor *cfg =
&usbd_dev->config[usbd_dev->current_config - 1];
(*buf)[0] = cfg->bConfigurationValue;
return 1;
@ -320,7 +323,8 @@ static int usb_standard_set_interface(usbd_device *usbd_dev,
struct usb_setup_data *req,
uint8_t **buf, uint16_t *len)
{
const struct usb_config_descriptor *cfx = &usbd_dev->config[usbd_dev->current_config - 1];
const struct usb_config_descriptor *cfx =
&usbd_dev->config[usbd_dev->current_config - 1];
const struct usb_interface *iface;
(void)buf;
@ -343,7 +347,8 @@ static int usb_standard_set_interface(usbd_device *usbd_dev,
if (usbd_dev->user_callback_set_altsetting) {
usbd_dev->user_callback_set_altsetting(usbd_dev,
req->wIndex, req->wValue);
req->wIndex,
req->wValue);
}
*len = 0;
@ -356,7 +361,8 @@ static int usb_standard_get_interface(usbd_device *usbd_dev,
uint8_t **buf, uint16_t *len)
{
uint8_t *cur_altsetting;
const struct usb_config_descriptor *cfx = &usbd_dev->config[usbd_dev->current_config - 1];
const struct usb_config_descriptor *cfx =
&usbd_dev->config[usbd_dev->current_config - 1];
if (req->wIndex >= cfx->bNumInterfaces) {
return USBD_REQ_NOTSUPP;

6
lib/vf6xx/ccm.c
View File

@ -102,8 +102,7 @@ uint32_t ccm_get_pll_pfd(uint32_t pfd_sel, uint32_t pll_pfd, uint32_t pll_clk)
uint64_t pll_pfd_clk;
uint32_t pll_pfd_frac = pll_pfd;
switch(pfd_sel)
{
switch (pfd_sel) {
case CCM_CCSR_PLL_PFD_CLK_SEL_MAIN:
return pll_clk;
case CCM_CCSR_PLL_PFD_CLK_SEL_PFD1:
@ -164,8 +163,7 @@ void ccm_calculate_clocks()
ipg_clk_div += 1;
/* Get Cortex-A5 core clock from system clock selection */
switch(ccsr & CCM_CCSR_SYS_CLK_SEL_MASK)
{
switch (ccsr & CCM_CCSR_SYS_CLK_SEL_MASK) {
case CCM_CCSR_SYS_CLK_SEL_FAST:
ccm_core_clk = 24000000;
break;

8
tests/gadget-zero/main-stm32f072disco.c
View File

@ -25,7 +25,7 @@
#include <stdio.h>
#include "usb-gadget0.h"
// no trace on cm0 #define ER_DEBUG
/* no trace on cm0 #define ER_DEBUG */
#ifdef ER_DEBUG
#define ER_DPRINTF(fmt, ...) \
do { printf(fmt, ## __VA_ARGS__); } while (0)
@ -35,7 +35,8 @@
#endif
#include "trace.h"
void trace_send_blocking8(int stimulus_port, char c) {
void trace_send_blocking8(int stimulus_port, char c)
{
(void)stimulus_port;
(void)c;
}
@ -52,7 +53,8 @@ int main(void)
gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO7);
gpio_set(GPIOC, GPIO7);
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver, "stm32f072disco");
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver,
"stm32f072disco");
ER_DPRINTF("bootup complete\n");
gpio_clear(GPIOC, GPIO7);

6
tests/gadget-zero/main-stm32f103-generic.c
View File

@ -51,13 +51,15 @@ int main(void)
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
gpio_clear(GPIOA, GPIO11);
for (unsigned int i = 0; i < 800000; i++)
for (unsigned int i = 0; i < 800000; i++) {
__asm__("nop");
}
rcc_periph_clock_enable(RCC_OTGFS);
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v1_usb_driver, "stm32f103-generic");
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v1_usb_driver,
"stm32f103-generic");
ER_DPRINTF("bootup complete\n");
gpio_clear(GPIOC, GPIO13);

10
tests/gadget-zero/main-stm32l053disco.c
View File

@ -26,7 +26,7 @@
#include <stdio.h>
#include "usb-gadget0.h"
// no trace on cm0 #define ER_DEBUG
/* no trace on cm0 #define ER_DEBUG */
#ifdef ER_DEBUG
#define ER_DPRINTF(fmt, ...) \
do { printf(fmt, ## __VA_ARGS__); } while (0)
@ -36,7 +36,8 @@
#endif
#include "trace.h"
void trace_send_blocking8(int stimulus_port, char c) {
void trace_send_blocking8(int stimulus_port, char c)
{
(void)stimulus_port;
(void)c;
}
@ -56,7 +57,7 @@ int main(void)
/* HSI48 needs the vrefint turned on */
rcc_periph_clock_enable(RCC_SYSCFG);
SYSCFG_CFGR3 |= SYSCFG_CFGR3_ENREF_HSI48 | SYSCFG_CFGR3_EN_VREFINT;
while(!(SYSCFG_CFGR3 & SYSCFG_CFGR3_REF_HSI48_RDYF));
while (!(SYSCFG_CFGR3 & SYSCFG_CFGR3_REF_HSI48_RDYF));
/* For USB, but can't use HSI48 as a sysclock on L0 */
crs_autotrim_usb_enable();
@ -65,7 +66,8 @@ int main(void)
rcc_osc_on(HSI48);
rcc_wait_for_osc_ready(HSI48);
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver, "stm32l053disco");
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v2_usb_driver,
"stm32l053disco");
ER_DPRINTF("bootup complete\n");
gpio_clear(GPIOA, GPIO5);

7
tests/gadget-zero/main-stm32l1-generic.c
View File

@ -34,8 +34,8 @@
do { } while (0)
#endif
const clock_scale_t this_clock_config =
{ /* 32MHz PLL from 8MHz HSE */
const clock_scale_t this_clock_config = {
/* 32MHz PLL from 8MHz HSE */
.pll_source = RCC_CFGR_PLLSRC_HSE_CLK,
.pll_mul = RCC_CFGR_PLLMUL_MUL12,
.pll_div = RCC_CFGR_PLLDIV_DIV3,
@ -57,7 +57,8 @@ int main(void)
gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO1);
gpio_set(GPIOB, GPIO1);
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v1_usb_driver, "stm32l1-generic");
usbd_device *usbd_dev = gadget0_init(&st_usbfs_v1_usb_driver,
"stm32l1-generic");
ER_DPRINTF("bootup complete\n");
gpio_clear(GPIOB, GPIO1);

25
tests/gadget-zero/usb-gadget0.c
View File

@ -111,7 +111,7 @@ static const struct usb_interface_descriptor iface_loopback[] = {
{
.bLength = USB_DT_INTERFACE_SIZE,
.bDescriptorType = USB_DT_INTERFACE,
.bInterfaceNumber = 0, // still 0, as it's a different config...?
.bInterfaceNumber = 0, /* still 0, as it's a different config...? */
.bAlternateSetting = 0,
.bNumEndpoints = 2,
.bInterfaceClass = USB_CLASS_VENDOR,
@ -141,7 +141,7 @@ static const struct usb_config_descriptor config[] = {
.wTotalLength = 0,
.bNumInterfaces = 1,
.bConfigurationValue = GZ_CFG_SOURCESINK,
.iConfiguration = 4, // string index
.iConfiguration = 4, /* string index */
.bmAttributes = 0x80,
.bMaxPower = 0x32,
.interface = ifaces_sourcesink,
@ -152,7 +152,7 @@ static const struct usb_config_descriptor config[] = {
.wTotalLength = 0,
.bNumInterfaces = 1,
.bConfigurationValue = GZ_CFG_LOOPBACK,
.iConfiguration = 5, // string index
.iConfiguration = 5, /* string index */
.bmAttributes = 0x80,
.bMaxPower = 0x32,
.interface = ifaces_loopback,
@ -160,7 +160,7 @@ static const struct usb_config_descriptor config[] = {
};
static char serial[] = "0123456789.0123456789.0123456789";
static const char * usb_strings[] = {
static const char *usb_strings[] = {
"libopencm3",
"Gadget-Zero",
serial,
@ -184,8 +184,8 @@ static struct {
static void gadget0_ss_out_cb(usbd_device *usbd_dev, uint8_t ep)
{
(void) ep;
// TODO - if you're really keen, perf test this. tiva implies it matters
//char buf[64] __attribute__ ((aligned(4)));
/* TODO - if you're really keen, perf test this. tiva implies it matters */
/* char buf[64] __attribute__ ((aligned(4))); */
char buf[64];
trace_send_blocking8(0, 'O');
uint16_t x = usbd_ep_read_packet(usbd_dev, ep, buf, sizeof(buf));
@ -214,21 +214,21 @@ static void gadget0_ss_in_cb(usbd_device *usbd_dev, uint8_t ep)
if (x != sizeof(buf)) {
ER_DPRINTF("failed to write?: %d\n", x);
}
//assert(x == sizeof(buf));
/*assert(x == sizeof(buf));*/
}
static void gadget0_rx_cb_loopback(usbd_device *usbd_dev, uint8_t ep)
{
(void) usbd_dev;
ER_DPRINTF("loop rx %x\n", ep);
// TODO - unimplemented - consult linux source on proper behaviour
/* TODO - unimplemented - consult linux source on proper behaviour */
}
static void gadget0_tx_cb_loopback(usbd_device *usbd_dev, uint8_t ep)
{
(void) usbd_dev;
ER_DPRINTF("loop tx %x\n", ep);
// TODO - unimplemented - consult linux source on proper behaviour
/* TODO - unimplemented - consult linux source on proper behaviour */
}
static int gadget0_control_request(usbd_device *usbd_dev,
@ -242,9 +242,10 @@ static int gadget0_control_request(usbd_device *usbd_dev,
(void) buf;
(void) len;
ER_DPRINTF("ctrl breq: %x, bmRT: %x, windex :%x, wlen: %x, wval :%x\n",
req->bRequest, req->bmRequestType, req->wIndex, req->wLength, req->wValue);
req->bRequest, req->bmRequestType, req->wIndex, req->wLength,
req->wValue);
// TODO - what do the return values mean again?
/* TODO - what do the return values mean again? */
switch (req->bRequest) {
case GZ_REQ_SET_PATTERN:
state.pattern_counter = 0;
@ -301,7 +302,7 @@ static void gadget0_set_config(usbd_device *usbd_dev, uint16_t wValue)
}
}
usbd_device* gadget0_init(const usbd_driver *driver, const char *userserial)
usbd_device *gadget0_init(const usbd_driver *driver, const char *userserial)
{
#ifdef ER_DEBUG
setbuf(stdout, NULL);

2
tests/gadget-zero/usb-gadget0.h
View File

@ -30,6 +30,6 @@
* to the hardware.
* @return the usbd_device created.
*/
usbd_device* gadget0_init(const usbd_driver *driver, const char *userserial);
usbd_device *gadget0_init(const usbd_driver *driver, const char *userserial);
#endif

27
tests/shared/trace.c
View File

@ -4,32 +4,34 @@
#include <libopencm3/cm3/itm.h>
#include "trace.h"
void trace_send_blocking8(int stimulus_port, char c) {
void trace_send_blocking8(int stimulus_port, char c)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}
while (!(ITM_STIM8(stimulus_port) & ITM_STIM_FIFOREADY))
;
while (!(ITM_STIM8(stimulus_port) & ITM_STIM_FIFOREADY));
ITM_STIM8(stimulus_port) = c;
}
void trace_send8(int stimulus_port, char val) {
void trace_send8(int stimulus_port, char val)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}
ITM_STIM8(stimulus_port) = val;
}
void trace_send_blocking16(int stimulus_port, uint16_t val) {
void trace_send_blocking16(int stimulus_port, uint16_t val)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}
while (!(ITM_STIM16(stimulus_port) & ITM_STIM_FIFOREADY))
;
while (!(ITM_STIM16(stimulus_port) & ITM_STIM_FIFOREADY));
ITM_STIM16(stimulus_port) = val;
}
void trace_send16(int stimulus_port, uint16_t val) {
void trace_send16(int stimulus_port, uint16_t val)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}
@ -37,16 +39,17 @@ void trace_send16(int stimulus_port, uint16_t val) {
}
void trace_send_blocking32(int stimulus_port, uint32_t val) {
void trace_send_blocking32(int stimulus_port, uint32_t val)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}
while (!(ITM_STIM32(stimulus_port) & ITM_STIM_FIFOREADY))
;
while (!(ITM_STIM32(stimulus_port) & ITM_STIM_FIFOREADY));
ITM_STIM32(stimulus_port) = val;
}
void trace_send32(int stimulus_port, uint32_t val) {
void trace_send32(int stimulus_port, uint32_t val)
{
if (!(ITM_TER[0] & (1<<stimulus_port))) {
return;
}