merge irq and nvic code using a script
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nvic.h: irq.yaml
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./irq2nvic_h
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @file
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*
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* Definitions of interrupt names on EFM32 Tiny Gecko systems
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*
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* The names and numbers are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
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*/
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#ifndef LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
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#define LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
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#define IRQ_DMA 0
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#define IRQ_GPIO_EVEN 1
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#define IRQ_TIMER0 2
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#define IRQ_USART0_RX 3
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#define IRQ_USART0_TX 4
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#define IRQ_ACMP01 5
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#define IRQ_ADC0 6
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#define IRQ_DAC0 7
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#define IRQ_I2C0 8
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#define IRQ_GPIO_ODD 9
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#define IRQ_TIMER1 10
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#define IRQ_USART1_RX 11
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#define IRQ_USART1_TX 12
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#define IRQ_LESENSE 13
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#define IRQ_LEUART0 14
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#define IRQ_LETIMER0 15
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#define IRQ_PCNT0 16
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#define IRQ_RTC 17
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#define IRQ_CMU 18
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#define IRQ_VCMP 19
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#define IRQ_LCD 20
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#define IRQ_MSC 21
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#define IRQ_AES 22
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#define IRQ_COUNT 23 /**< See also d0002_efm32_cortex-m3_reference_manual.pdf's table 1.1's "number of interrupts" line, which shows that there are really no more interrupts and it is sufficient to allocate only 23 slots. */
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#define WEAK __attribute__ ((weak))
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void WEAK dma_isr(void);
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void WEAK gpio_even_isr(void);
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void WEAK timer0_isr(void);
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void WEAK usart0_rx_isr(void);
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void WEAK usart0_tx_isr(void);
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void WEAK acmp01_isr(void);
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void WEAK adc0_isr(void);
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void WEAK dac0_isr(void);
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void WEAK i2c0_isr(void);
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void WEAK gpio_odd_isr(void);
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void WEAK timer1_isr(void);
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void WEAK usart1_rx_isr(void);
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void WEAK usart1_tx_isr(void);
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void WEAK lesense_isr(void);
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void WEAK leuart0_isr(void);
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void WEAK letimer0_isr(void);
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void WEAK pcnt0_isr(void);
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void WEAK rtc_isr(void);
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void WEAK cmu_isr(void);
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void WEAK vcmp_isr(void);
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void WEAK lcd_isr(void);
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void WEAK msc_isr(void);
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void WEAK aes_isr(void);
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#pragma weak dma_isr = blocking_handler
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#pragma weak gpio_even_isr = blocking_handler
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#pragma weak timer0_isr = blocking_handler
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#pragma weak usart0_rx_isr = blocking_handler
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#pragma weak usart0_tx_isr = blocking_handler
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#pragma weak acmp01_isr = blocking_handler
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#pragma weak adc0_isr = blocking_handler
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#pragma weak dac0_isr = blocking_handler
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#pragma weak i2c0_isr = blocking_handler
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#pragma weak gpio_odd_isr = blocking_handler
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#pragma weak timer1_isr = blocking_handler
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#pragma weak usart1_rx_isr = blocking_handler
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#pragma weak usart1_tx_isr = blocking_handler
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#pragma weak lesense_isr = blocking_handler
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#pragma weak leuart0_isr = blocking_handler
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#pragma weak letimer0_isr = blocking_handler
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#pragma weak pcnt0_isr = blocking_handler
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#pragma weak rtc_isr = blocking_handler
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#pragma weak cmu_isr = blocking_handler
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#pragma weak vcmp_isr = blocking_handler
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#pragma weak lcd_isr = blocking_handler
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#pragma weak msc_isr = blocking_handler
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#pragma weak aes_isr = blocking_handler
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#define IRQ_HANDLERS \
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[IRQ_DMA] = dma_isr, \
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[IRQ_GPIO_EVEN] = gpio_even_isr, \
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[IRQ_TIMER0] = timer0_isr, \
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[IRQ_USART0_RX] = usart0_rx_isr, \
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[IRQ_USART0_TX] = usart0_tx_isr, \
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[IRQ_ACMP01] = acmp01_isr, \
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[IRQ_ADC0] = adc0_isr, \
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[IRQ_DAC0] = dac0_isr, \
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[IRQ_I2C0] = i2c0_isr, \
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[IRQ_GPIO_ODD] = gpio_odd_isr, \
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[IRQ_TIMER1] = timer1_isr, \
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[IRQ_USART1_RX] = usart1_rx_isr, \
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[IRQ_USART1_TX] = usart1_tx_isr, \
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[IRQ_LESENSE] = lesense_isr, \
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[IRQ_LEUART0] = leuart0_isr, \
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[IRQ_LETIMER0] = letimer0_isr, \
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[IRQ_PCNT0] = pcnt0_isr, \
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[IRQ_RTC] = rtc_isr, \
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[IRQ_CMU] = cmu_isr, \
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[IRQ_VCMP] = vcmp_isr, \
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[IRQ_LCD] = lcd_isr, \
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[IRQ_MSC] = msc_isr, \
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[IRQ_AES] = aes_isr,
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#endif
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includeguard: LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
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partname_humanreadable: EFM32 Tiny Gecko series
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partname_doxygen: EFM32TG
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# The names and sequence are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
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irqs:
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- dma
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- gpio_even
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- timer0
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- usart0_rx
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- usart0_tx
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- acmp01
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- adc0
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- dac0
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- i2c0
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- gpio_odd
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- timer1
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- usart1_rx
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- usart1_tx
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- lesense
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- leuart0
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- letimer0
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- pcnt0
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- rtc
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- cmu
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- vcmp
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- lcd
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- msc
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- aes
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#!/usr/bin/env python
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# This file is part of the libopencm3 project.
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#
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# Copyright (C) 2012 chrysn <chrysn@fsfe.org>
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#
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# This library is free software: you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU Lesser General Public License for more details.
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#
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# You should have received a copy of the GNU Lesser General Public License
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# along with this library. If not, see <http://www.gnu.org/licenses/>.
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import sys
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import yaml
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template = '''\
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/* This file is part of the libopencm3 project.
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*
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* It was generated by the irq2nvic_h script.
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*/
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#ifndef {includeguard}
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#define {includeguard}
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/** @defgroup CM3_nvic_defines_{partname_doxygen} User interrupts for {partname_humanreadable}
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@ingroup CM3_nvic_defines
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@{{*/
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{irqdefinitions}
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#define NVIC_IRQ_COUNT {irqcount}
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/**@}}*/
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#define WEAK __attribute__ ((weak))
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/** @defgroup CM3_nvic_isrprototypes_{partname_doxygen} User interrupt service routines (ISR) prototypes for {partname_humanreadable}
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@ingroup CM3_nvic_isrprototypes
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@{{*/
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{isrprototypes}
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/**@}}*/
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/** @defgroup CM3_nvic_isrpragmas_{partname_doxygen} User interrupt service routines (ISR) defaults for {partname_humanreadable}
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@ingroup CM3_nvic_isrpragmas
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@{{*/
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{isrpragmas}
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/**@}}*/
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/* Initialization template for the interrupt vector table. This definition is
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* used by the startup code generator (vector.c) to set the initial values for
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* the interrupt handling routines to the chip family specific _isr weak
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* symbols. */
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#define IRQ_HANDLERS \\
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{vectortableinitialization}
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#endif /* {includeguard} */
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'''
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def convert(infile, outfile):
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data = yaml.load(infile)
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irq2name = list(enumerate(data['irqs']) if isinstance(data['irqs'], list) else data['irqs'].items())
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irqnames = [v for (k,v) in irq2name]
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data['irqdefinitions'] = "\n".join('#define NVIC_%s_IRQ %d'%(v.upper(),k) for (k,v) in irq2name)
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data['irqcount'] = len(irq2name) # FIXME: what if it's a sparse dictionary?
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data['isrprototypes'] = "\n".join('void WEAK %s_isr(void);'%name.lower() for name in irqnames)
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data['isrpragmas'] = "\n".join('#pragma weak %s_isr = blocking_handler'%name.lower() for name in irqnames)
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data['vectortableinitialization'] = ', \\\n '.join('[NVIC_%s_IRQ] = %s_isr'%(name.upper(), name.lower()) for name in irqnames)
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outfile.write(template.format(**data))
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def main():
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convert(open('irq.yaml'), open('nvic.h', 'w'))
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if __name__ == "__main__":
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main()
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