stm32l0:rcc: add rcc_set_pll_source() as per L1
reported by: kaeipnos in https://github.com/libopencm3/libopencm3/pull/609
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@ -687,6 +687,7 @@ void rcc_set_hsi48_source_pll(void);
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void rcc_set_sysclk_source(enum rcc_osc osc);
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void rcc_set_pll_multiplier(uint32_t factor);
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void rcc_set_pll_divider(uint32_t factor);
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void rcc_set_pll_source(uint32_t pllsrc);
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void rcc_set_ppre2(uint32_t ppre2);
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void rcc_set_ppre1(uint32_t ppre1);
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void rcc_set_hpre(uint32_t hpre);
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@ -336,6 +336,19 @@ void rcc_set_pll_divider(uint32_t factor)
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RCC_CFGR = reg | (factor << RCC_CFGR_PLLDIV_SHIFT);
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}
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/**
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* Set the pll source.
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* @param pllsrc RCC_CFGR_PLLSRC_HSI16_CLK or RCC_CFGR_PLLSRC_HSE_CLK
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*/
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void rcc_set_pll_source(uint32_t pllsrc)
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{
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uint32_t reg32;
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reg32 = RCC_CFGR;
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reg32 &= ~(RCC_CFGR_PLLSRC_HSE_CLK << 16);
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RCC_CFGR = (reg32 | (pllsrc<<16));
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Set the APB1 Prescale Factor.
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*
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