Rename indexed #define macros for channel-specific GPDMA registers, to match documentation and avoid conflict with the GPDMA_CONFIG register name.
This commit is contained in:
parent
e9eacc60ac
commit
8abefef07d
|
@ -102,59 +102,60 @@ LGPL License Terms @ref lgpl_license
|
|||
/* Channel registers */
|
||||
|
||||
/* Source Address Register */
|
||||
#define GPDMA_SRCADDR(channel) MMIO32(channel + 0x000)
|
||||
#define GPDMA_C0SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7SRCADDR GPDMA_SRCADDR(GPDMA_CHANNEL7)
|
||||
#define GPDMA_CSRCADDR(channel) MMIO32(channel + 0x000)
|
||||
#define GPDMA_C0SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7SRCADDR GPDMA_CSRCADDR(GPDMA_CHANNEL7)
|
||||
|
||||
/* Destination Address Register */
|
||||
#define GPDMA_DESTADDR(channel) MMIO32(channel + 0x004)
|
||||
#define GPDMA_C0DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7DESTADDR GPDMA_DESTADDR(GPDMA_CHANNEL7)
|
||||
#define GPDMA_CDESTADDR(channel) MMIO32(channel + 0x004)
|
||||
#define GPDMA_C0DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7DESTADDR GPDMA_CDESTADDR(GPDMA_CHANNEL7)
|
||||
|
||||
/* Linked List Item Register */
|
||||
#define GPDMA_LLI(channel) MMIO32(channel + 0x008)
|
||||
#define GPDMA_C0LLI GPDMA_LLI(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1LLI GPDMA_LLI(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2LLI GPDMA_LLI(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3LLI GPDMA_LLI(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4LLI GPDMA_LLI(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5LLI GPDMA_LLI(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6LLI GPDMA_LLI(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7LLI GPDMA_LLI(GPDMA_CHANNEL7)
|
||||
#define GPDMA_CLLI(channel) MMIO32(channel + 0x008)
|
||||
#define GPDMA_C0LLI GPDMA_CLLI(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1LLI GPDMA_CLLI(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2LLI GPDMA_CLLI(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3LLI GPDMA_CLLI(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4LLI GPDMA_CLLI(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5LLI GPDMA_CLLI(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6LLI GPDMA_CLLI(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7LLI GPDMA_CLLI(GPDMA_CHANNEL7)
|
||||
|
||||
/* Control Register */
|
||||
#define GPDMA_CONTROL(channel) MMIO32(channel + 0x00C)
|
||||
#define GPDMA_C0CONTROL GPDMA_CONTROL(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1CONTROL GPDMA_CONTROL(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2CONTROL GPDMA_CONTROL(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3CONTROL GPDMA_CONTROL(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4CONTROL GPDMA_CONTROL(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5CONTROL GPDMA_CONTROL(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6CONTROL GPDMA_CONTROL(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7CONTROL GPDMA_CONTROL(GPDMA_CHANNEL7)
|
||||
#define GPDMA_CCONTROL(channel) MMIO32(channel + 0x00C)
|
||||
#define GPDMA_C0CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7CONTROL GPDMA_CCONTROL(GPDMA_CHANNEL7)
|
||||
|
||||
/* Configuration Register */
|
||||
#define GPDMA_CONFIG(channel) MMIO32(channel + 0x010)
|
||||
#define GPDMA_C0CONFIG GPDMA_CONFIG(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1CONFIG GPDMA_CONFIG(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2CONFIG GPDMA_CONFIG(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3CONFIG GPDMA_CONFIG(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4CONFIG GPDMA_CONFIG(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5CONFIG GPDMA_CONFIG(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6CONFIG GPDMA_CONFIG(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7CONFIG GPDMA_CONFIG(GPDMA_CHANNEL7)
|
||||
#define GPDMA_CCONFIG(channel) MMIO32(channel + 0x010)
|
||||
#define GPDMA_C0CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL0)
|
||||
#define GPDMA_C1CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL1)
|
||||
#define GPDMA_C2CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL2)
|
||||
#define GPDMA_C3CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL3)
|
||||
#define GPDMA_C4CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL4)
|
||||
#define GPDMA_C5CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL5)
|
||||
#define GPDMA_C6CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL6)
|
||||
#define GPDMA_C7CONFIG GPDMA_CCONFIG(GPDMA_CHANNEL7)
|
||||
|
||||
|
||||
/**@}*/
|
||||
|
||||
|
|
Loading…
Reference in New Issue