stm32l4: flash: support basic core operations
Heavily reformatted by: Karl Palsson <karlp@tweak.net.au> Signed-off-by: Karl Palsson <karlp@tweak.net.au>
This commit is contained in:
benjaminlevine
Karl Palsson
parent
c5b00c3dda
commit
69a3ba6e2a
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@ -32,6 +32,8 @@
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# include <libopencm3/stm32/f4/flash.h>
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#elif defined(STM32L1)
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# include <libopencm3/stm32/l1/flash.h>
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#elif defined(STM32L4)
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# include <libopencm3/stm32/l4/flash.h>
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#else
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# error "stm32 family not defined."
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#endif
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@ -0,0 +1,254 @@
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/** @defgroup flash_defines FLASH Defines
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*
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* @ingroup STM32L4xx_defines
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*
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* @brief <b>Defined Constants and Types for the STM32L4xx Flash Control</b>
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*
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* @version 1.0.0
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*
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* @author @htmlonly © @endhtmlonly 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* @date 12 February 2016
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*
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* LGPL License Terms @ref lgpl_license
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* */
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* RM0351 Reference manual: STM32L4x6 advanced ARM®-based 32-bit MCUs
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* December 2015, Doc ID 024597 Rev 3
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*/
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/**@{*/
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#ifndef LIBOPENCM3_FLASH_H
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#define LIBOPENCM3_FLASH_H
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_PDKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_ECCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18)
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#define FLASH_OPTR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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#define FLASH_PCROP1SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x24)
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#define FLASH_PCROP1ER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x28)
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#define FLASH_WRP1AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x2C)
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#define FLASH_WRP1BR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x30)
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#define FLASH_PCROP2SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x44)
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#define FLASH_PCROP2ER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x48)
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#define FLASH_WRP2AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x4C)
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#define FLASH_WRP2BR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x50)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_SLEEP_PD (1 << 14)
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#define FLASH_ACR_RUN_PD (1 << 13)
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#define FLASH_ACR_DCRST (1 << 12)
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#define FLASH_ACR_ICRST (1 << 11)
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#define FLASH_ACR_DCEN (1 << 10)
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#define FLASH_ACR_ICEN (1 << 9)
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#define FLASH_ACR_PRFTEN (1 << 8)
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY_MASK 0x03
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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#define FLASH_ACR_LATENCY_3WS 0x03
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_BSY (1 << 16)
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#define FLASH_SR_OPTVERR (1 << 15)
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#define FLASH_SR_RDERR (1 << 14)
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#define FLASH_SR_FASTERR (1 << 9)
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#define FLASH_SR_MISERR (1 << 8)
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#define FLASH_SR_PGSERR (1 << 7)
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#define FLASH_SR_SIZERR (1 << 6)
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#define FLASH_SR_PGAERR (1 << 5)
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#define FLASH_SR_WRPERR (1 << 4)
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#define FLASH_SR_PROGERR (1 << 3)
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#define FLASH_SR_OPERR (1 << 1)
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#define FLASH_SR_EOP (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_LOCK (1 << 31)
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#define FLASH_CR_OPTLOCK (1 << 30)
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#define FLASH_CR_OBL_LAUNCH (1 << 27)
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#define FLASH_CR_RDERRIE (1 << 26)
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#define FLASH_CR_ERRIE (1 << 25)
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#define FLASH_CR_EOPIE (1 << 24)
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#define FLASH_CR_FSTPG (1 << 18)
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#define FLASH_CR_OPTSTRT (1 << 17)
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#define FLASH_CR_START (1 << 16)
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#define FLASH_CR_MER2 (1 << 15)
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#define FLASH_CR_BKER (1 << 11)
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#define FLASH_CR_MER1 (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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#define FLASH_CR_PNB_SHIFT 3
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#define FLASH_CR_PNB_MASK 0xff
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/* --- FLASH_ECCR values -------------------------------------------------- */
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#define FLASH_ECCR_ECCD (1 << 31)
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#define FLASH_ECCR_ECCC (1 << 30)
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#define FLASH_ECCR_ECCIE (1 << 24)
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#define FLASH_ECCR_SYSF_ECC (1 << 20)
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#define FLASH_ECCR_BK_ECC (1 << 19)
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#define FLASH_ECCR_ADDR_ECC_SHIFT 0
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#define FLASH_ECCR_ADDR_ECC_MASK 0x7ffff
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/* --- FLASH_OPTR values -------------------------------------------------- */
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#define FLASH_OPTR_SRAM2_RST (1 << 25)
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#define FLASH_OPTR_SRAM2_PE (1 << 24)
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#define FLASH_OPTR_nBOOT1 (1 << 23)
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#define FLASH_OPTR_DUALBANK (1 << 21)
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#define FLASH_OPTR_BFB2 (1 << 20)
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#define FLASH_OPTR_WWDG_SW (1 << 19)
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#define FLASH_OPTR_IWDG_STDBY (1 << 18)
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#define FLASH_OPTR_IWDG_STOP (1 << 17)
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#define FLASH_OPTR_IDWG_SW (1 << 16)
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#define FLASH_OPTR_nRST_SHDW (1 << 14)
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#define FLASH_OPTR_nRST_STDBY (1 << 13)
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#define FLASH_OPTR_nRST_STOP (1 << 12)
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#define FLASH_OPTR_BOR_SHIFT 8
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#define FLASH_OPTR_BOR_MASK 0x700
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#define FLASH_OPTR_BOR_LEVEL_0 0
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#define FLASH_OPTR_BOR_LEVEL_1 1
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#define FLASH_OPTR_BOR_LEVEL_2 2
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#define FLASH_OPTR_BOR_LEVEL_3 3
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#define FLASH_OPTR_BOR_LEVEL_4 4
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#define FLASH_OPTR_RDP_SHIFT 0
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#define FLASH_OPTR_RDP_MASK 0xff
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#define FLASH_OPTR_RDP_LEVEL_0 0xAA
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#define FLASH_OPTR_RDP_LEVEL_1 0xBB
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#define FLASH_OPTR_RDP_LEVEL_2 0xCC
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/* --- FLASH_PCROP1SR values -------------------------------------------------- */
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#define FLASH_PCROP1SR_PCROP1_STRT_SHIFT 0
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#define FLASH_PCROP1SR_PCROP1_STRT_MASK 0xffff
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/* --- FLASH_PCROP1ER values -------------------------------------------------- */
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#define FLASH_PCROP1ER_PCROP_RDP (1 << 31)
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#define FLASH_PCROP1ER_PCROP1_END_SHIFT 0
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#define FLASH_PCROP1ER_PCROP1_END_MASK 0xffff
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/* --- FLASH_WRP1AR values -------------------------------------------------- */
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#define FLASH_WRP1AR_WRP1A_END_SHIFT 16
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#define FLASH_WRP1AR_WRP1A_END_MASK 0xff
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#define FLASH_WRP1AR_WRP1A_STRT_SHIFT 0
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#define FLASH_WRP1AR_WRP1A_STRT_MASK 0xff
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/* --- FLASH_WRP1BR values -------------------------------------------------- */
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#define FLASH_WRP1BR_WRP1B_END_SHIFT 16
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#define FLASH_WRP1BR_WRP1B_END_MASK 0xff
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#define FLASH_WRP1BR_WRP1B_STRT_SHIFT 0
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#define FLASH_WRP1BR_WRP1B_STRT_MASK 0xff
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/* --- FLASH_PCROP2SR values -------------------------------------------------- */
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#define FLASH_PCROP2SR_PCROP2_STRT_SHIFT 0
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#define FLASH_PCROP2SR_PCROP2_STRT_MASK 0xffff
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/* --- FLASH_PCROP2ER values -------------------------------------------------- */
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#define FLASH_PCROP2ER_PCROP2_END_SHIFT 0
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#define FLASH_PCROP2ER_PCROP2_END_MASK 0xffff
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/* --- FLASH_WRP2AR values -------------------------------------------------- */
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#define FLASH_WRP2AR_WRP2A_END_SHIFT 16
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#define FLASH_WRP2AR_WRP2A_END_MASK 0xff
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#define FLASH_WRP2AR_WRP2A_STRT_SHIFT 0
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#define FLASH_WRP2AR_WRP2A_STRT_MASK 0xff
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/* --- FLASH_WRP2BR values -------------------------------------------------- */
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#define FLASH_WRP2BR_WRP2B_END_SHIFT 16
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#define FLASH_WRP2BR_WRP2B_END_MASK 0xff
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#define FLASH_WRP2BR_WRP2B_STRT_SHIFT 0
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#define FLASH_WRP2BR_WRP2B_STRT_MASK 0xff
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_PDKEYR_PDKEY1 ((uint32_t)0x04152637)
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#define FLASH_PDKEYR_PDKEY2 ((uint32_t)0xfafbfcfd)
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
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#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_set_ws(uint32_t ws);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgperr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_wait_for_last_operation(void);
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void flash_dcache_enable(void);
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void flash_dcache_disable(void);
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void flash_icache_enable(void);
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void flash_icache_disable(void);
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void flash_prefetch_enable(void);
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void flash_prefetch_disable(void);
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void flash_dcache_reset(void);
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void flash_icache_reset(void);
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void flash_clear_pgserr_flag(void);
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void flash_clear_pgaerr_flag(void);
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void flash_clear_wrperr_flag(void);
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void flash_clear_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_lock_option_bytes(void);
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void flash_program_word(uint32_t address, uint32_t data);
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void flash_program(uint32_t address, uint8_t *data, uint32_t len);
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void flash_erase_sector(uint8_t sector);
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void flash_erase_all_sectors(void);
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void flash_program_option_bytes(uint32_t data);
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END_DECLS
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#endif
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/**@}*/
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@ -37,7 +37,7 @@ TGT_CFLAGS += $(DEBUG_FLAGS)
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ARFLAGS = rcs
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# Specific objs
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OBJS = adc.o pwr.o rcc.o
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OBJS = adc.o flash.o pwr.o rcc.o
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# common/shared objs
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OBJS += rcc_common_all.o
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@ -0,0 +1,343 @@
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/** @defgroup flash_file FLASH
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*
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* @ingroup STM32L4xx
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*
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* @brief <b>libopencm3 STM32L4xx FLASH</b>
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*
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* @version 1.0.0
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*
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* Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* @date 12 February 2016
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*
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* This library supports the FLASH memory controller in the STM32L4
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* series of ARM Cortex Microcontrollers by ST Microelectronics.
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*
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* For the STM32L4xx, accessing FLASH memory is described briefly in
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* section 3 of the STM32L4x6 Reference Manual.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/flash.h>
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/** @brief Enable the FLASH Prefetch Buffer
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This buffer is used for instruction fetches and is enabled by default after
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reset.
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Note carefully the clock restrictions under which the prefetch buffer may be
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enabled or disabled. Changes are normally made while the clock is running in
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the power-on low frequency mode before being set to a higher speed mode.
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See the reference manual for details.
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*/
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void flash_prefetch_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_PRFTEN;
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}
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/** @brief Disable the FLASH Prefetch Buffer
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Note carefully the clock restrictions under which the prefetch buffer may be
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set to disabled. See the reference manual for details.
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*/
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void flash_prefetch_disable(void)
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{
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FLASH_ACR &= ~FLASH_ACR_PRFTEN;
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}
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/** @brief Set the Number of Wait States
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Used to match the system clock to the FLASH memory access time. See the
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programming manual for more information on clock speed ranges. The latency must
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be changed to the appropriate value <b>before</b> any increase in clock
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speed, or <b>after</b> any decrease in clock speed.
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@param[in] ws values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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{
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uint32_t reg32;
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reg32 = FLASH_ACR;
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reg32 &= ~(FLASH_ACR_LATENCY_MASK << FLASH_ACR_LATENCY_SHIFT);
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reg32 |= (ws << FLASH_ACR_LATENCY_SHIFT);
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FLASH_ACR = reg32;
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}
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/** @brief Unlock the Flash Program and Erase Controller
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* This enables write access to the Flash memory. It is locked by default on
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* reset.
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*/
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void flash_unlock(void)
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{
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/* Clear the unlock sequence state. */
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FLASH_CR |= FLASH_CR_LOCK;
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/* Authorize the FPEC access. */
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FLASH_KEYR = FLASH_KEYR_KEY1;
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FLASH_KEYR = FLASH_KEYR_KEY2;
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}
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/** @brief Lock the Flash Program and Erase Controller
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* Used to prevent spurious writes to FLASH.
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*/
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void flash_lock(void)
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{
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FLASH_CR |= FLASH_CR_LOCK;
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}
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/** @brief Clear the Programming Error Status Flag
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*/
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void flash_clear_pgperr_flag(void)
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{
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FLASH_SR |= FLASH_SR_PROGERR;
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}
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/** @brief Clear the End of Operation Status Flag
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*/
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void flash_clear_eop_flag(void)
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{
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FLASH_SR |= FLASH_SR_EOP;
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}
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/** @brief Clear the Busy Status Flag
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*/
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void flash_clear_bsy_flag(void)
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{
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FLASH_SR &= ~FLASH_SR_BSY;
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}
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/** @brief Wait until Last Operation has Ended
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* This loops indefinitely until an operation (write or erase) has completed
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* by testing the busy flag.
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*/
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void flash_wait_for_last_operation(void)
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{
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while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
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}
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/** @brief Enable the Data Cache
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*/
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void flash_dcache_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_DCEN;
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}
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/** @brief Disable the Data Cache
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*/
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void flash_dcache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_DCEN;
|
||||
}
|
||||
|
||||
/** @brief Enable the Instruction Cache
|
||||
*/
|
||||
void flash_icache_enable(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICEN;
|
||||
}
|
||||
|
||||
/** @brief Disable the Instruction Cache
|
||||
*/
|
||||
void flash_icache_disable(void)
|
||||
{
|
||||
FLASH_ACR &= ~FLASH_ACR_ICEN;
|
||||
}
|
||||
|
||||
|
||||
/** @brief Reset the Data Cache
|
||||
* The data cache must be disabled for this to have effect.
|
||||
*/
|
||||
void flash_dcache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_DCRST;
|
||||
}
|
||||
|
||||
/** @brief Reset the Instruction Cache
|
||||
* The instruction cache must be disabled for this to have effect.
|
||||
*/
|
||||
void flash_icache_reset(void)
|
||||
{
|
||||
FLASH_ACR |= FLASH_ACR_ICRST;
|
||||
}
|
||||
|
||||
/** @brief Clear the Programming Sequence Error Flag
|
||||
* This flag is set when incorrect programming configuration has been made.
|
||||
*/
|
||||
void flash_clear_pgserr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGSERR;
|
||||
}
|
||||
|
||||
/** @brief Clear the Programming Alignment Error Flag
|
||||
*/
|
||||
void flash_clear_pgaerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGAERR;
|
||||
}
|
||||
|
||||
/** @brief Clear the Write Protect Error Flag
|
||||
*/
|
||||
void flash_clear_wrperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_WRPERR;
|
||||
}
|
||||
|
||||
/** @brief Clear All Status Flags
|
||||
* Program error, end of operation, write protect error, busy.
|
||||
*/
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
flash_clear_pgserr_flag();
|
||||
flash_clear_pgaerr_flag();
|
||||
flash_clear_wrperr_flag();
|
||||
flash_clear_pgperr_flag();
|
||||
flash_clear_eop_flag();
|
||||
flash_clear_bsy_flag();
|
||||
}
|
||||
|
||||
/** @brief Unlock the Option Byte Access
|
||||
* This enables write access to the option bytes. It is locked by default on
|
||||
* reset.
|
||||
*/
|
||||
void flash_unlock_option_bytes(void)
|
||||
{
|
||||
/* Clear the unlock state. */
|
||||
FLASH_CR |= FLASH_CR_OPTLOCK;
|
||||
|
||||
/* Unlock option bytes. */
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY1;
|
||||
FLASH_OPTKEYR = FLASH_OPTKEYR_KEY2;
|
||||
}
|
||||
|
||||
/** @brief Lock the Option Byte Access
|
||||
* This disables write access to the option bytes. It is locked by default on
|
||||
* reset.
|
||||
*/
|
||||
void flash_lock_option_bytes(void)
|
||||
{
|
||||
FLASH_CR |= FLASH_CR_OPTLOCK;
|
||||
}
|
||||
|
||||
/** @brief Program a 32 bit Word to FLASH
|
||||
* This performs all operations necessary to program a 32 bit word to FLASH
|
||||
* memory. The program error flag should be checked separately for the event
|
||||
* that memory was not properly erased.
|
||||
*
|
||||
* @param[in] address Starting address in Flash.
|
||||
* @param[in] data word to write
|
||||
*/
|
||||
void flash_program_word(uint32_t address, uint32_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the word. */
|
||||
MMIO32(address) = data;
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
/** @brief Program a Data Block to FLASH
|
||||
* This programs an arbitrary length data block to FLASH memory.
|
||||
* The program error flag should be checked separately for the event that
|
||||
* memory was not properly erased.
|
||||
* @param[in] address Starting address in Flash.
|
||||
* @param[in] data Pointer to start of data block.
|
||||
* @param[in] len Length of data block.
|
||||
*/
|
||||
void flash_program(uint32_t address, uint8_t *data, uint32_t len)
|
||||
{
|
||||
/* TODO: Use dword and word size program operations where possible for
|
||||
* turbo speed.
|
||||
*/
|
||||
uint32_t i;
|
||||
for (i = 0; i < len; i++) {
|
||||
flash_program_word(address+i, data[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/** @brief Erase a Sector of FLASH
|
||||
* This performs all operations necessary to erase a sector in FLASH memory.
|
||||
* The page should be checked to ensure that it was properly erased. A sector
|
||||
* must first be fully erased before attempting to program it.
|
||||
* See the reference manual or the FLASH programming manual for details.
|
||||
* @param[in] sector (0 - 11 for some parts, 0-23 on others)
|
||||
*/
|
||||
void flash_erase_sector(uint8_t sector)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR &= ~(FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT);
|
||||
FLASH_CR |= (sector & FLASH_CR_PNB_MASK) << FLASH_CR_PNB_SHIFT;
|
||||
FLASH_CR |= FLASH_CR_PER;
|
||||
FLASH_CR |= FLASH_CR_START;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_PER;
|
||||
FLASH_CR &= ~(FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT);
|
||||
}
|
||||
|
||||
/** @brief Erase All FLASH
|
||||
* This performs all operations necessary to erase all sectors in the FLASH
|
||||
* memory.
|
||||
*/
|
||||
void flash_erase_all_sectors(void)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR |= FLASH_CR_MER1 | FLASH_CR_MER2;
|
||||
FLASH_CR |= FLASH_CR_START;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_MER1 & ~FLASH_CR_MER2;
|
||||
}
|
||||
|
||||
/** @brief Program the Option Bytes
|
||||
* This performs all operations necessary to program the option bytes.
|
||||
* The option bytes do not need to be erased first.
|
||||
* @param[in] data value to be programmed.
|
||||
*/
|
||||
void flash_program_option_bytes(uint32_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
if (FLASH_CR & FLASH_CR_OPTLOCK) {
|
||||
flash_unlock_option_bytes();
|
||||
}
|
||||
|
||||
FLASH_OPTR = data & ~0x3;
|
||||
FLASH_OPTR |= FLASH_CR_OPTSTRT;
|
||||
flash_wait_for_last_operation();
|
||||
}
|
||||
/**@}*/
|
||||
Loading…
Reference in New Issue