stm32l4: adc: Initial support for the adc-v2 periph

Now that there's an adc-v2 peripheral layer, we can just use it straight away
for L4.
This commit is contained in:
Karl Palsson 2015-11-05 22:56:53 +00:00
parent 81319a96fb
commit 697c975dde
4 changed files with 86 additions and 0 deletions

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@ -32,6 +32,8 @@
# include <libopencm3/stm32/l0/adc.h>
#elif defined(STM32L1)
# include <libopencm3/stm32/l1/adc.h>
#elif defined(STM32L4)
# include <libopencm3/stm32/l4/adc.h>
#else
# error "stm32 family not defined."
#endif

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@ -0,0 +1,80 @@
/** @defgroup adc_defines ADC Defines
*
* @brief <b>Defined Constants and Types for the STM32L4xx Analog to Digital
* Converter</b>
*
* @ingroup STM32L4xx_defines
*
* @version 1.0.0
*
* @date 24 Oct 2015
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_ADC_H
#define LIBOPENCM3_ADC_H
#include <libopencm3/stm32/common/adc_common_v2.h>
#include <libopencm3/stm32/common/adc_common_v2_multi.h>
/** @defgroup adc_reg_base ADC register base addresses
* @ingroup adc_defines
*
*@{*/
#define ADC1 ADC1_BASE
#define ADC2 ADC2_BASE
#define ADC3 ADC3_BASE
/**@}*/
/** @defgroup adc_channel ADC Channel Numbers
* @ingroup adc_defines
*
*@{*/
#define ADC_CHANNEL_VREF 0
#define ADC_CHANNEL_TEMP 17
#define ADC_CHANNEL_VBAT 18
/**@}*/
/****************************************************************************/
/* ADC_SMPRx ADC Sample Time Selection for Channels */
/** @defgroup adc_sample ADC Sample Time Selection values
@ingroup adc_defines
@{*/
#define ADC_SMPR_SMP_2DOT5CYC 0x0
#define ADC_SMPR_SMP_6DOT5CYC 0x1
#define ADC_SMPR_SMP_12DOT5CYC 0x2
#define ADC_SMPR_SMP_24DOT5CYC 0x3
#define ADC_SMPR_SMP_47DOT5CYC 0x4
#define ADC_SMPR_SMP_92DOT5CYC 0x5
#define ADC_SMPR_SMP_247DOT5CYC 0x6
#define ADC_SMPR_SMP_640DOT5CYC 0x7
/**@}*/
BEGIN_DECLS
END_DECLS
#endif

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@ -703,6 +703,7 @@ enum rcc_periph_clken {
RCC_RNG = _REG_BIT(RCC_AHB2ENR_OFFSET, 18),
RCC_AES = _REG_BIT(RCC_AHB2ENR_OFFSET, 16),
RCC_ADC = _REG_BIT(RCC_AHB2ENR_OFFSET, 13),
RCC_ADC1 = _REG_BIT(RCC_AHB2ENR_OFFSET, 13), /* Compatibility */
RCC_OTGFS = _REG_BIT(RCC_AHB2ENR_OFFSET, 12),
RCC_GPIOH = _REG_BIT(RCC_AHB2ENR_OFFSET, 7),
RCC_GPIOG = _REG_BIT(RCC_AHB2ENR_OFFSET, 6),
@ -771,6 +772,7 @@ enum rcc_periph_clken {
SCC_RNG = _REG_BIT(RCC_AHB2SMENR_OFFSET, 18),
SCC_AES = _REG_BIT(RCC_AHB2SMENR_OFFSET, 16),
SCC_ADC = _REG_BIT(RCC_AHB2SMENR_OFFSET, 13),
SCC_ADC1 = _REG_BIT(RCC_AHB2SMENR_OFFSET, 13), /* Compatibility */
SCC_OTGFS = _REG_BIT(RCC_AHB2SMENR_OFFSET, 12),
SCC_SRAM2 = _REG_BIT(RCC_AHB2SMENR_OFFSET, 9),
SCC_GPIOH = _REG_BIT(RCC_AHB2SMENR_OFFSET, 7),
@ -841,6 +843,7 @@ enum rcc_periph_rst {
RST_RNG = _REG_BIT(RCC_AHB2RSTR_OFFSET, 18),
RST_AES = _REG_BIT(RCC_AHB2RSTR_OFFSET, 16),
RST_ADC = _REG_BIT(RCC_AHB2RSTR_OFFSET, 13),
RST_ADC1 = _REG_BIT(RCC_AHB2RSTR_OFFSET, 13), /* Compatibility */
RST_OTGFS = _REG_BIT(RCC_AHB2RSTR_OFFSET, 12),
RST_GPIOH = _REG_BIT(RCC_AHB2RSTR_OFFSET, 7),
RST_GPIOG = _REG_BIT(RCC_AHB2RSTR_OFFSET, 6),

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@ -42,6 +42,7 @@ OBJS =
# common/shared objs
OBJS += rcc_common_all.o
OBJS += gpio_common_all.o gpio_common_f0234.o
OBJS += adc_common_v2.o
VPATH += ../../usb:../:../../cm3:../common
VPATH += ../../ethernet