usb: Moved USB_PMA_BASE address definition to family-specific memorymap.h
credit: @fenugrec
This commit is contained in:
parent
6357630a90
commit
5c73d60176
|
@ -58,7 +58,7 @@
|
|||
#define I2C1_BASE (PERIPH_BASE_APB + 0x5400)
|
||||
#define I2C2_BASE (PERIPH_BASE_APB + 0x5800)
|
||||
#define USB_DEV_FS_BASE (PERIPH_BASE_APB + 0x5C00)
|
||||
/* USB_PMA_BASE already defined in usb.h */
|
||||
#define USB_PMA_BASE (PERIPH_BASE_APB + 0x6000)
|
||||
#define BX_CAN1_BASE (PERIPH_BASE_APB + 0x6400)
|
||||
|
||||
#define CRS_BASE (PERIPH_BASE_APB + 0x6C00)
|
||||
|
|
|
@ -59,6 +59,7 @@
|
|||
#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
|
||||
#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
|
||||
#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
|
||||
#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define USB_CAN_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define BX_CAN1_BASE (PERIPH_BASE_APB1 + 0x6400)
|
||||
#define BX_CAN2_BASE (PERIPH_BASE_APB1 + 0x6800)
|
||||
|
|
|
@ -58,7 +58,7 @@
|
|||
#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
|
||||
#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
|
||||
#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5C00)
|
||||
#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define BX_CAN_BASE (PERIPH_BASE_APB1 + 0x6400)
|
||||
/* PERIPH_BASE_APB1 + 0x6800 (0x4000 6800 - 0x4000 6BFF): Reserved */
|
||||
/* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
|
||||
#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
|
||||
#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
|
||||
#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define CRS_BASE (PERIPH_BASE_APB1 + 0x6C00)
|
||||
#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
|
||||
#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
|
||||
|
|
|
@ -56,7 +56,7 @@
|
|||
#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
|
||||
#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
|
||||
#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
|
||||
#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
#define USB_PMA_BASE (PERIPH_BASE_APB1 + 0x6000)
|
||||
/* gap */
|
||||
#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
|
||||
#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
|
||||
|
|
|
@ -41,11 +41,6 @@ LGPL License Terms @ref lgpl_license
|
|||
#include <libopencm3/stm32/memorymap.h>
|
||||
#include <libopencm3/stm32/tools.h>
|
||||
|
||||
/* --- USB base addresses -------------------------------------------------- */
|
||||
|
||||
/* USB packet buffer memory base address. */
|
||||
#define USB_PMA_BASE 0x40006000L
|
||||
|
||||
/* --- USB general registers ----------------------------------------------- */
|
||||
|
||||
/* USB Control register */
|
||||
|
|
Loading…
Reference in New Issue