stm32g4: Implement FLASH
This commit is contained in:
Ben Brewer
Karl Palsson
parent
c26eab2513
commit
59569bfb04
|
|
@ -40,6 +40,8 @@
|
|||
# include <libopencm3/stm32/l4/flash.h>
|
||||
#elif defined(STM32G0)
|
||||
# include <libopencm3/stm32/g0/flash.h>
|
||||
#elif defined(STM32G4)
|
||||
# include <libopencm3/stm32/g4/flash.h>
|
||||
#elif defined(STM32H7)
|
||||
# include <libopencm3/stm32/h7/flash.h>
|
||||
#elif defined(GD32F1X0)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,265 @@
|
|||
/** @defgroup flash_defines FLASH Defines
|
||||
*
|
||||
* @ingroup STM32G4xx_defines
|
||||
*
|
||||
* @brief <b>Defined Constants and Types for the STM32G4xx Flash Control</b>
|
||||
*
|
||||
* @version 1.0.0
|
||||
*
|
||||
* @author @htmlonly © @endhtmlonly 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
|
||||
* @author @htmlonly © @endhtmlonly 2020 Ben Brewer <ben.brewer@codethink.co.uk>
|
||||
*
|
||||
* @date 30 July 2020
|
||||
*
|
||||
* LGPL License Terms @ref lgpl_license
|
||||
* */
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
|
||||
* Copyright (C) 2020 Ben Brewer <ben.brewer@codethink.co.uk>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/*
|
||||
* For details see:
|
||||
* RM0440 Reference manual: STM32G4 Series advanced ARM®-based 32-bit MCUs
|
||||
* 15 April 2020, Doc ID 00355726 Rev 4
|
||||
*/
|
||||
|
||||
/**@{*/
|
||||
#ifndef LIBOPENCM3_FLASH_H
|
||||
#define LIBOPENCM3_FLASH_H
|
||||
|
||||
#include <libopencm3/stm32/common/flash_common_all.h>
|
||||
#include <libopencm3/stm32/common/flash_common_f.h>
|
||||
#include <libopencm3/stm32/common/flash_common_idcache.h>
|
||||
|
||||
/* --- FLASH registers ----------------------------------------------------- */
|
||||
|
||||
#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
|
||||
#define FLASH_PDKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
|
||||
#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
|
||||
#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
|
||||
#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
|
||||
#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
|
||||
#define FLASH_ECCR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x18)
|
||||
#define FLASH_OPTR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
|
||||
#define FLASH_PCROP1SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x24)
|
||||
#define FLASH_PCROP1ER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x28)
|
||||
#define FLASH_WRP1AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x2C)
|
||||
#define FLASH_WRP1BR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x30)
|
||||
#define FLASH_PCROP2SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x44)
|
||||
#define FLASH_PCROP2ER MMIO32(FLASH_MEM_INTERFACE_BASE + 0x48)
|
||||
#define FLASH_WRP2AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x4C)
|
||||
#define FLASH_WRP2BR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x50)
|
||||
#define FLASH_SEC1R MMIO32(FLASH_MEM_INTERFACE_BASE + 0x70)
|
||||
#define FLASH_SEC2R MMIO32(FLASH_MEM_INTERFACE_BASE + 0x74)
|
||||
|
||||
/* --- FLASH_ACR values ---------------------------------------------------- */
|
||||
|
||||
#define FLASH_ACR_DBG_SWEN (1 << 18)
|
||||
#define FLASH_ACR_SLEEP_PD (1 << 14)
|
||||
#define FLASH_ACR_RUN_PD (1 << 13)
|
||||
#define FLASH_ACR_PRFTEN (1 << 8)
|
||||
|
||||
#define FLASH_ACR_LATENCY_SHIFT 0
|
||||
#define FLASH_ACR_LATENCY_MASK 0xf
|
||||
|
||||
/* --- FLASH_SR values ----------------------------------------------------- */
|
||||
|
||||
#define FLASH_SR_BSY (1 << 16)
|
||||
#define FLASH_SR_OPTVERR (1 << 15)
|
||||
#define FLASH_SR_RDERR (1 << 14)
|
||||
#define FLASH_SR_FASTERR (1 << 9)
|
||||
#define FLASH_SR_MISERR (1 << 8)
|
||||
#define FLASH_SR_PGSERR (1 << 7)
|
||||
#define FLASH_SR_SIZERR (1 << 6)
|
||||
#define FLASH_SR_PGAERR (1 << 5)
|
||||
#define FLASH_SR_WRPERR (1 << 4)
|
||||
#define FLASH_SR_PROGERR (1 << 3)
|
||||
#define FLASH_SR_OPERR (1 << 1)
|
||||
#define FLASH_SR_EOP (1 << 0)
|
||||
|
||||
/* --- FLASH_CR values ----------------------------------------------------- */
|
||||
|
||||
#define FLASH_CR_LOCK (1 << 31)
|
||||
#define FLASH_CR_OPTLOCK (1 << 30)
|
||||
#define FLASH_CR_SEC_PROT2 (1 << 29)
|
||||
#define FLASH_CR_SEC_PROT1 (1 << 28)
|
||||
#define FLASH_CR_OBL_LAUNCH (1 << 27)
|
||||
#define FLASH_CR_RDERRIE (1 << 26)
|
||||
#define FLASH_CR_ERRIE (1 << 25)
|
||||
#define FLASH_CR_EOPIE (1 << 24)
|
||||
#define FLASH_CR_FSTPG (1 << 18)
|
||||
#define FLASH_CR_OPTSTRT (1 << 17)
|
||||
#define FLASH_CR_START (1 << 16)
|
||||
#define FLASH_CR_MER2 (1 << 15)
|
||||
#define FLASH_CR_BKER (1 << 11)
|
||||
#define FLASH_CR_MER1 (1 << 2)
|
||||
#define FLASH_CR_PER (1 << 1)
|
||||
#define FLASH_CR_PG (1 << 0)
|
||||
|
||||
#define FLASH_CR_PNB_SHIFT 3
|
||||
#define FLASH_CR_PNB_MASK 0x7f
|
||||
|
||||
/* --- FLASH_ECCR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_ECCR_ECCD (1 << 31)
|
||||
#define FLASH_ECCR_ECCC (1 << 30)
|
||||
#define FLASH_ECCR_ECCD2 (1 << 31)
|
||||
#define FLASH_ECCR_ECCC2 (1 << 30)
|
||||
#define FLASH_ECCR_ECCIE (1 << 24)
|
||||
#define FLASH_ECCR_SYSF_ECC (1 << 22)
|
||||
#define FLASH_ECCR_BK_ECC (1 << 21)
|
||||
|
||||
#define FLASH_ECCR_ADDR_ECC_SHIFT 0
|
||||
#define FLASH_ECCR_ADDR_ECC_MASK 0x7ffff
|
||||
|
||||
/* --- FLASH_OPTR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_OPTR_IRHEN (1 << 30)
|
||||
|
||||
#define FLASH_OPTR_NRST_MODE_SHIFT 28
|
||||
#define FLASH_OPTR_NRST_MODE_MASK 0x3
|
||||
#define FLASH_OPTR_NRST_MODE_RESET 1
|
||||
#define FLASH_OPTR_NRST_MODE_GPIO 2
|
||||
#define FLASH_OPTR_NRST_MODE_BIDIR 3
|
||||
|
||||
#define FLASH_OPTR_nBOOT0 (1 << 27)
|
||||
#define FLASH_OPTR_nSWBOOT0 (1 << 26)
|
||||
#define FLASH_OPTR_SRAM_RST (1 << 25)
|
||||
#define FLASH_OPTR_SRAM_PE (1 << 24)
|
||||
#define FLASH_OPTR_nBOOT1 (1 << 23)
|
||||
#define FLASH_OPTR_DUALBANK (1 << 21)
|
||||
#define FLASH_OPTR_BFB2 (1 << 20)
|
||||
#define FLASH_OPTR_WWDG_SW (1 << 19)
|
||||
#define FLASH_OPTR_IWDG_STDBY (1 << 18)
|
||||
#define FLASH_OPTR_IWDG_STOP (1 << 17)
|
||||
#define FLASH_OPTR_IDWG_SW (1 << 16)
|
||||
#define FLASH_OPTR_nRST_SHDW (1 << 14)
|
||||
#define FLASH_OPTR_nRST_STDBY (1 << 13)
|
||||
#define FLASH_OPTR_nRST_STOP (1 << 12)
|
||||
|
||||
#define FLASH_OPTR_BOR_SHIFT 8
|
||||
#define FLASH_OPTR_BOR_MASK 0x7
|
||||
#define FLASH_OPTR_BOR_LEVEL_0 0
|
||||
#define FLASH_OPTR_BOR_LEVEL_1 1
|
||||
#define FLASH_OPTR_BOR_LEVEL_2 2
|
||||
#define FLASH_OPTR_BOR_LEVEL_3 3
|
||||
#define FLASH_OPTR_BOR_LEVEL_4 4
|
||||
|
||||
#define FLASH_OPTR_RDP_SHIFT 0
|
||||
#define FLASH_OPTR_RDP_MASK 0xff
|
||||
#define FLASH_OPTR_RDP_LEVEL_0 0xAA
|
||||
#define FLASH_OPTR_RDP_LEVEL_1 0xBB
|
||||
#define FLASH_OPTR_RDP_LEVEL_2 0xCC
|
||||
|
||||
/* --- FLASH_PCROP1SR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_PCROP1SR_PCROP1_STRT_SHIFT 0
|
||||
#define FLASH_PCROP1SR_PCROP1_STRT_MASK 0x7fff
|
||||
|
||||
/* --- FLASH_PCROP1ER values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_PCROP1ER_PCROP_RDP (1 << 31)
|
||||
#define FLASH_PCROP1ER_PCROP1_END_SHIFT 0
|
||||
#define FLASH_PCROP1ER_PCROP1_END_MASK 0x7fff
|
||||
|
||||
/* --- FLASH_WRP1AR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_WRP1AR_WRP1A_END_SHIFT 16
|
||||
#define FLASH_WRP1AR_WRP1A_END_MASK 0x7f
|
||||
|
||||
#define FLASH_WRP1AR_WRP1A_STRT_SHIFT 0
|
||||
#define FLASH_WRP1AR_WRP1A_STRT_MASK 0x7f
|
||||
|
||||
/* --- FLASH_WRP1BR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_WRP1BR_WRP1B_END_SHIFT 16
|
||||
#define FLASH_WRP1BR_WRP1B_END_MASK 0x7f
|
||||
|
||||
#define FLASH_WRP1BR_WRP1B_STRT_SHIFT 0
|
||||
#define FLASH_WRP1BR_WRP1B_STRT_MASK 0x7f
|
||||
|
||||
/* --- FLASH_PCROP2SR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_PCROP2SR_PCROP2_STRT_SHIFT 0
|
||||
#define FLASH_PCROP2SR_PCROP2_STRT_MASK 0x7fff
|
||||
|
||||
/* --- FLASH_PCROP2ER values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_PCROP2ER_PCROP2_END_SHIFT 0
|
||||
#define FLASH_PCROP2ER_PCROP2_END_MASK 0x7fff
|
||||
|
||||
/* --- FLASH_WRP2AR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_WRP2AR_WRP2A_END_SHIFT 16
|
||||
#define FLASH_WRP2AR_WRP2A_END_MASK 0x7f
|
||||
|
||||
#define FLASH_WRP2AR_WRP2A_STRT_SHIFT 0
|
||||
#define FLASH_WRP2AR_WRP2A_STRT_MASK 0x7f
|
||||
|
||||
/* --- FLASH_WRP2BR values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_WRP2BR_WRP2B_END_SHIFT 16
|
||||
#define FLASH_WRP2BR_WRP2B_END_MASK 0xff
|
||||
|
||||
#define FLASH_WRP2BR_WRP2B_STRT_SHIFT 0
|
||||
#define FLASH_WRP2BR_WRP2B_STRT_MASK 0xff
|
||||
|
||||
/* --- FLASH_SEC1R values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_SEC1R_BOOT_LOCK (1 << 16)
|
||||
|
||||
#define FLASH_SEC1R_SEC_SIZE1_SHIFT 0
|
||||
#define FLASH_SEC1R_SEC_SIZE1_MASK 0xff
|
||||
|
||||
/* --- FLASH_SEC2R values -------------------------------------------------- */
|
||||
|
||||
#define FLASH_SEC2R_SEC_SIZE2_SHIFT 0
|
||||
#define FLASH_SEC2R_SEC_SIZE2_MASK 0xff
|
||||
|
||||
/* --- FLASH Keys -----------------------------------------------------------*/
|
||||
|
||||
#define FLASH_PDKEYR_PDKEY1 ((uint32_t)0x04152637)
|
||||
#define FLASH_PDKEYR_PDKEY2 ((uint32_t)0xfafbfcfd)
|
||||
|
||||
#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
|
||||
#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
|
||||
|
||||
#define FLASH_OPTKEYR_KEY1 ((uint32_t)0x08192a3b)
|
||||
#define FLASH_OPTKEYR_KEY2 ((uint32_t)0x4c5d6e7f)
|
||||
|
||||
/* --- Function prototypes ------------------------------------------------- */
|
||||
|
||||
BEGIN_DECLS
|
||||
|
||||
void flash_clear_progerr_flag(void);
|
||||
void flash_clear_pgserr_flag(void);
|
||||
void flash_clear_size_flag(void);
|
||||
void flash_clear_pgaerr_flag(void);
|
||||
void flash_clear_wrperr_flag(void);
|
||||
void flash_lock_option_bytes(void);
|
||||
void flash_program_double_word(uint32_t address, uint64_t data);
|
||||
void flash_program(uint32_t address, uint8_t *data, uint32_t len);
|
||||
void flash_erase_page(uint32_t page);
|
||||
void flash_erase_all_pages(void);
|
||||
void flash_program_option_bytes(uint32_t data);
|
||||
|
||||
END_DECLS
|
||||
|
||||
#endif
|
||||
/**@}*/
|
||||
|
|
@ -35,6 +35,7 @@ TGT_CFLAGS += $(DEBUG_FLAGS)
|
|||
TGT_CFLAGS += $(STANDARD_FLAGS)
|
||||
ARFLAGS = rcs
|
||||
|
||||
OBJS += flash.o flash_common_all.o flash_common_f.o flash_common_idcache.o
|
||||
OBJS += gpio_common_all.o gpio_common_f0234.o
|
||||
OBJS += pwr.o
|
||||
OBJS += rcc_common_all.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,209 @@
|
|||
/** @defgroup flash_file FLASH peripheral API
|
||||
*
|
||||
* @ingroup peripheral_apis
|
||||
*
|
||||
* @brief <b>libopencm3 STM32G4xx FLASH</b>
|
||||
*
|
||||
* @version 1.0.0
|
||||
*
|
||||
* Benjamin Levine <benjamin@jesco.karoo.co.uk>
|
||||
* Ben Brewer <ben.brewer@codethink.co.uk>
|
||||
*
|
||||
* @date 30 July 2020
|
||||
*
|
||||
* This library supports the FLASH memory controller in the STM32G4
|
||||
* series of ARM Cortex Microcontrollers by ST Microelectronics.
|
||||
*
|
||||
* For the STM32G4xx, accessing FLASH memory is described briefly in
|
||||
* section 3 of the STM32G4 Reference Manual.
|
||||
*
|
||||
* LGPL License Terms @ref lgpl_license
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file is part of the libopencm3 project.
|
||||
*
|
||||
* Copyright (C) 2016 Benjamin Levine <benjamin@jesco.karoo.co.uk>
|
||||
* Copyright (C) 2020 Ben Brewer <ben.brewer@codethink.co.uk>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**@{*/
|
||||
|
||||
#include <libopencm3/stm32/flash.h>
|
||||
|
||||
/** @brief Wait until Last Operation has Ended
|
||||
* This loops indefinitely until an operation (write or erase) has completed
|
||||
* by testing the busy flag.
|
||||
*/
|
||||
void flash_wait_for_last_operation(void)
|
||||
{
|
||||
while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
|
||||
}
|
||||
|
||||
/** @brief Clear the Programming Sequence Error Flag
|
||||
* This flag is set when incorrect programming configuration has been made.
|
||||
*/
|
||||
void flash_clear_pgserr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGSERR;
|
||||
}
|
||||
|
||||
/** Clear programming size error flag */
|
||||
void flash_clear_size_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_SIZERR;
|
||||
}
|
||||
|
||||
/** @brief Clear the Programming Alignment Error Flag
|
||||
*/
|
||||
void flash_clear_pgaerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PGAERR;
|
||||
}
|
||||
|
||||
/** @brief Clear the Write Protect Error Flag
|
||||
*/
|
||||
void flash_clear_wrperr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_WRPERR;
|
||||
}
|
||||
|
||||
/** @brief Clear the Programming Error Status Flag
|
||||
*/
|
||||
void flash_clear_progerr_flag(void)
|
||||
{
|
||||
FLASH_SR |= FLASH_SR_PROGERR;
|
||||
}
|
||||
|
||||
/** @brief Clear All Status Flags
|
||||
* Program error, end of operation, write protect error, busy.
|
||||
*/
|
||||
void flash_clear_status_flags(void)
|
||||
{
|
||||
flash_clear_pgserr_flag();
|
||||
flash_clear_size_flag();
|
||||
flash_clear_pgaerr_flag();
|
||||
flash_clear_wrperr_flag();
|
||||
flash_clear_progerr_flag();
|
||||
flash_clear_eop_flag();
|
||||
}
|
||||
|
||||
/** @brief Lock the Option Byte Access
|
||||
* This disables write access to the option bytes. It is locked by default on
|
||||
* reset.
|
||||
*/
|
||||
void flash_lock_option_bytes(void)
|
||||
{
|
||||
FLASH_CR |= FLASH_CR_OPTLOCK;
|
||||
}
|
||||
|
||||
/** @brief Program a 64 bit word to FLASH
|
||||
*
|
||||
* This performs all operations necessary to program a 64 bit word to FLASH memory.
|
||||
* The program error flag should be checked separately for the event that memory
|
||||
* was not properly erased.
|
||||
*
|
||||
* @param[in] address Starting address in Flash.
|
||||
* @param[in] data Double word to write
|
||||
*/
|
||||
void flash_program_double_word(uint32_t address, uint64_t data)
|
||||
{
|
||||
/* Ensure that all flash operations are complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Enable writes to flash. */
|
||||
FLASH_CR |= FLASH_CR_PG;
|
||||
|
||||
/* Program the each word separately. */
|
||||
MMIO32(address) = (uint32_t)data;
|
||||
MMIO32(address+4) = (uint32_t)(data >> 32);
|
||||
|
||||
/* Wait for the write to complete. */
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* Disable writes to flash. */
|
||||
FLASH_CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
|
||||
/** @brief Program a Data Block to FLASH
|
||||
* This programs an arbitrary length data block to FLASH memory.
|
||||
* The program error flag should be checked separately for the event that
|
||||
* memory was not properly erased.
|
||||
* @param[in] address Starting address in Flash.
|
||||
* @param[in] data Pointer to start of data block.
|
||||
* @param[in] len Length of data block in bytes (multiple of 8).
|
||||
*/
|
||||
void flash_program(uint32_t address, uint8_t *data, uint32_t len)
|
||||
{
|
||||
for (uint32_t i = 0; i < len; i += 8) {
|
||||
flash_program_double_word(address+i, *(uint64_t*)(data + i));
|
||||
}
|
||||
}
|
||||
|
||||
/** @brief Erase a page of FLASH
|
||||
* @param[in] page (0 - 255 for bank 1, 256-511 for bank 2)
|
||||
*/
|
||||
void flash_erase_page(uint32_t page)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
/* page and bank are contiguous bits */
|
||||
FLASH_CR &= ~((FLASH_CR_PNB_MASK << FLASH_CR_PNB_SHIFT) | FLASH_CR_BKER);
|
||||
if (page > 255) {
|
||||
FLASH_CR |= FLASH_CR_BKER;
|
||||
}
|
||||
FLASH_CR |= page << FLASH_CR_PNB_SHIFT;
|
||||
FLASH_CR |= FLASH_CR_PER;
|
||||
FLASH_CR |= FLASH_CR_START;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_PER;
|
||||
}
|
||||
|
||||
/** @brief Erase All FLASH
|
||||
* This performs all operations necessary to erase all sectors in the FLASH
|
||||
* memory.
|
||||
*/
|
||||
void flash_erase_all_pages(void)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
FLASH_CR |= FLASH_CR_MER1 | FLASH_CR_MER2;
|
||||
FLASH_CR |= FLASH_CR_START;
|
||||
|
||||
flash_wait_for_last_operation();
|
||||
FLASH_CR &= ~FLASH_CR_MER1 & ~FLASH_CR_MER2;
|
||||
}
|
||||
|
||||
/** @brief Program the Option Bytes
|
||||
* This performs all operations necessary to program the option bytes.
|
||||
* The option bytes do not need to be erased first.
|
||||
* @param[in] data value to be programmed.
|
||||
*/
|
||||
void flash_program_option_bytes(uint32_t data)
|
||||
{
|
||||
flash_wait_for_last_operation();
|
||||
|
||||
if (FLASH_CR & FLASH_CR_OPTLOCK) {
|
||||
flash_unlock_option_bytes();
|
||||
}
|
||||
|
||||
FLASH_OPTR = data;
|
||||
FLASH_CR |= FLASH_CR_OPTSTRT;
|
||||
flash_wait_for_last_operation();
|
||||
}
|
||||
/**@}*/
|
||||
|
||||
Loading…
Reference in New Issue