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@ -44,12 +44,12 @@ conversion, which occurs after all channels have been scanned.
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@section adc_api_ex Basic ADC Handling API.
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Example 1: Simple single channel conversion polled. Enable the peripheral clock
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and ADC, reset ADC and set the prescaler divider. Set dual mode to independent.
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and ADC, reset ADC and set the prescaler divider. Set dual mode to independent
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(default). Enable triggering for a software trigger.
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@code
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rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_ADC1EN);
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adc_power_on(ADC1);
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adc_calibration(ADC1);
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adc_off(ADC1);
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rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST);
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rcc_peripheral_clear_reset(&RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST);
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rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV2);
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@ -58,6 +58,10 @@ and ADC, reset ADC and set the prescaler divider. Set dual mode to independent.
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adc_set_single_conversion_mode(ADC1);
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adc_set_sample_time(ADC1, ADC_CHANNEL0, ADC_SMPR1_SMP_1DOT5CYC);
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adc_set_single_channel(ADC1, ADC_CHANNEL0);
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adc_enable_trigger(ADC1, ADC_CR2_EXTSEL_SWSTART);
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adc_power_on(ADC1);
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adc_reset_calibration(ADC1);
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adc_calibration(ADC1);
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adc_start_conversion_regular(ADC1);
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while (! adc_eoc(ADC1));
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reg16 = adc_read_regular(ADC1);
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@ -144,6 +148,31 @@ is applied to ADC1 only. Start of conversion when triggered can cause simultaneo
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conversion with ADC2, or alternate conversion. Regular and injected conversions
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can be configured, each one being separately simultaneous or alternate.
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Fast interleaved mode starts ADC1 immediately on trigger, and ADC2 seven clock
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cycles later.
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Slow interleaved mode starts ADC1 immediately on trigger, and ADC2 fourteen clock
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cycles later, followed by ADC1 fourteen cycles later again. This can only be used
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on a single channel.
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Alternate trigger mode must occur on an injected channel group, and alternates
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between the ADCs on each trigger.
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Note that sampling must not overlap between ADCs on the same channel.
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Dual A/D converter modes possible:
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@li IND: Independent mode.
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@li CRSISM: Combined regular simultaneous + injected simultaneous mode.
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@li CRSATM: Combined regular simultaneous + alternate trigger mode.
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@li CISFIM: Combined injected simultaneous + fast interleaved mode.
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@li CISSIM: Combined injected simultaneous + slow interleaved mode.
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@li ISM: Injected simultaneous mode only.
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@li RSM: Regular simultaneous mode only.
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@li FIM: Fast interleaved mode only.
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@li SIM: Slow interleaved mode only.
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@li ATM: Alternate trigger mode only.
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@param[in] mode Unsigned int32. Dual mode selection from @ref adc_cr1_dualmod
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*/
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