diff --git a/include/libopencm3/stm32/common/adc_common_v2.h b/include/libopencm3/stm32/common/adc_common_v2.h index ba067d06..6acacc86 100644 --- a/include/libopencm3/stm32/common/adc_common_v2.h +++ b/include/libopencm3/stm32/common/adc_common_v2.h @@ -35,6 +35,16 @@ specific memorymap.h header before including this header file.*/ #ifndef LIBOPENCM3_ADC_COMMON_V2_H #define LIBOPENCM3_ADC_COMMON_V2_H +/* ADC common (shared) registers */ +#define ADC_CSR(adc) MMIO32((adc) + 0x300 + 0x0) +#define ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8) +#define ADC_CDR(adc) MMIO32((adc) + 0x300 + 0xa) + +/* ADC_CCR Values -----------------------------------------------------------*/ +#define ADC_CCR_VBATEN (1 << 24) +#define ADC_CCR_TSEN (1 << 23) +#define ADC_CCR_VREFEN (1 << 22) + /* --- Function prototypes ------------------------------------------------- */ diff --git a/include/libopencm3/stm32/f0/adc.h b/include/libopencm3/stm32/f0/adc.h index 3ed6499e..d86ea236 100644 --- a/include/libopencm3/stm32/f0/adc.h +++ b/include/libopencm3/stm32/f0/adc.h @@ -93,10 +93,6 @@ #define ADC_DR(base) MMIO32((base) + 0x40) #define ADC1_DR ADC_DR(ADC) - -/* Regular Data Register */ -#define ADC_CCR MMIO32(ADC_BASE + 0x308) - /*****************************************************************************/ /* Register values */ /*****************************************************************************/ @@ -204,11 +200,6 @@ #define ADC_DR_DATA 0xFFFF -/* ADC_CCR Values -----------------------------------------------------------*/ - -#define ADC_CCR_VBATEN (1 << 24) -#define ADC_CCR_TSEN (1 << 23) -#define ADC_CCR_VREFEN (1 << 22) /*****************************************************************************/ /* API definitions */ diff --git a/include/libopencm3/stm32/f3/adc.h b/include/libopencm3/stm32/f3/adc.h index c32b924c..4bd8fa20 100644 --- a/include/libopencm3/stm32/f3/adc.h +++ b/include/libopencm3/stm32/f3/adc.h @@ -255,10 +255,6 @@ #define ADC3_CALFACT ADC_CALFACT(ADC3_BASE) #define ADC4_CALFACT ADC_CALFACT(ADC4_BASE) -/* ADC common (shared) registers, adc_pair is ADC12 or ADC34 */ -#define ADC_CSR(adc_pair) MMIO32((adc_pair) + 0x300 + 0x0) -#define ADC_CCR(adc_pair) MMIO32((adc_pair) + 0x300 + 0x8) -#define ADC_CDR(adc_pair) MMIO32((adc_pair) + 0x300 + 0xa) #define ADC12_CSR ADC_CSR(ADC1) #define ADC12_CCR ADC_CCR(ADC1) #define ADC12_CDR ADC_CDR(ADC1) diff --git a/lib/stm32/f0/adc.c b/lib/stm32/f0/adc.c index 0bcb6653..64c3dd67 100644 --- a/lib/stm32/f0/adc.c +++ b/lib/stm32/f0/adc.c @@ -580,7 +580,7 @@ void adc_disable_dma(uint32_t adc) void adc_enable_vbat_sensor(void) { - ADC_CCR |= ADC_CCR_VBATEN; + ADC_CCR(ADC1) |= ADC_CCR_VBATEN; } /*---------------------------------------------------------------------------*/ @@ -592,7 +592,7 @@ void adc_enable_vbat_sensor(void) void adc_disable_vbat_sensor(void) { - ADC_CCR &= ~ADC_CCR_VBATEN; + ADC_CCR(ADC1) &= ~ADC_CCR_VBATEN; } /*---------------------------------------------------------------------------*/