From 2c1823f7bbae19f9322770e855555da08f8bcea8 Mon Sep 17 00:00:00 2001
From: Bruno Randolf <br1@einfach.org>
Date: Fri, 5 Jan 2018 13:36:05 +0000
Subject: [PATCH] stm32:l4: pwr: Add en/disable_backup_domain_write_protect()

---
 include/libopencm3/stm32/l4/pwr.h |  2 ++
 lib/stm32/l4/pwr.c                | 20 ++++++++++++++++++++
 2 files changed, 22 insertions(+)

diff --git a/include/libopencm3/stm32/l4/pwr.h b/include/libopencm3/stm32/l4/pwr.h
index f4d2b911..04919327 100644
--- a/include/libopencm3/stm32/l4/pwr.h
+++ b/include/libopencm3/stm32/l4/pwr.h
@@ -170,6 +170,8 @@ enum pwr_vos_scale {
 BEGIN_DECLS
 
 void pwr_set_vos_scale(enum pwr_vos_scale scale);
+void pwr_disable_backup_domain_write_protect(void);
+void pwr_enable_backup_domain_write_protect(void);
 
 END_DECLS
 
diff --git a/lib/stm32/l4/pwr.c b/lib/stm32/l4/pwr.c
index e6f71296..e6bd877a 100644
--- a/lib/stm32/l4/pwr.c
+++ b/lib/stm32/l4/pwr.c
@@ -52,4 +52,24 @@ void pwr_set_vos_scale(enum pwr_vos_scale scale)
 	}
 	PWR_CR1 = reg32;
 }
+
+/** Disable Backup Domain Write Protection
+ *
+ * This allows backup domain registers to be changed. These registers are write
+ * protected after a reset.
+ */
+void pwr_disable_backup_domain_write_protect(void)
+{
+	PWR_CR1 |= PWR_CR1_DBP;
+}
+
+/** Re-enable Backup Domain Write Protection
+ *
+ * This protects backup domain registers from inadvertent change.
+ */
+void pwr_enable_backup_domain_write_protect(void)
+{
+	PWR_CR1 &= ~PWR_CR1_DBP;
+}
+
 /**@}*/