Add RCC_CR3 values and some more comments.
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@ -126,19 +126,28 @@
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#define CR2_CPOL (1 << 10) /* Clock polarity */
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#define CR2_CPHA (1 << 9) /* Clock phase */
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#define CR2_LBCL (1 << 8) /* Last bit clock pulse */
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#define CR2_LBDIE (1 << 6) /* LIN break detection interrupt enable */
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#define CR2_LBDL (1 << 5) /* lin break detection length */
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#define CR2_LBDIE (1 << 6) /* LIN break det. int. en. */
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#define CR2_LBDL (1 << 5) /* LIN break det. length */
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/* CR2[3:0]: ADD */
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#define CR2_STOPBITS_1 0x00
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#define CR2_STOPBITS_0_5 0x01
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#define CR2_STOPBITS_2 0x02
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#define CR2_STOPBITS_1_5 0x03
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#define CR2_STOPBITS_1 0x00 /* 1 stop bit */
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#define CR2_STOPBITS_0_5 0x01 /* 0.5 stop bits */
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#define CR2_STOPBITS_2 0x02 /* 2 stop bits */
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#define CR2_STOPBITS_1_5 0x03 /* 1.5 stop bits */
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/* --- RCC_CR3 values ------------------------------------------------------ */
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/* TODO */
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#define CR3_CTSIE (1 << 10) /* CTS interrupt enable */
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#define CR3_CTSE (1 << 9) /* CTS enable */
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#define CR3_RTSE (1 << 8) /* RTS enable */
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#define CR3_DMAT (1 << 7) /* DMA enable transmitter */
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#define CR3_DMAR (1 << 6) /* DMA enable receiver */
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#define CR3_SCEN (1 << 5) /* Smartcard mode enable */
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#define CR3_NACK (1 << 4) /* Smartcard NACK enable */
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#define CR3_HDSEL (1 << 3) /* Half-duplex selection */
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#define CR3_IRLP (1 << 2) /* IrDA low-power */
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#define CR3_IREN (1 << 1) /* IrDA mode enable */
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#define CR3_EIE (1 << 0) /* Error interrupt enable */
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/* --- RCC_GTPR values ----------------------------------------------------- */
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