Fixed spi convenience reset function to compile properly.
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c49f505df4
commit
20c5e56234
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@ -18,6 +18,15 @@
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*/
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#include <libopencm3/stm32/spi.h>
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#if defined(STM32F1)
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# include <libopencm3/stm32/f1/rcc.h>
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#elif defined(STM32F2)
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# include <libopencm3/stm32/f2/rcc.h>
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#elif defined(STM32F4)
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# include <libopencm3/stm32/f4/rcc.h>
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#else
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# error "stm32 family not defined."
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#endif
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/*
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* SPI and I2S code.
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@ -40,12 +49,12 @@ void spi_reset(u32 spi_peripheral)
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rcc_peripheral_clear_reset(&RCC_APB2RSTR, RCC_APB2RSTR_SPI1RST);
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break;
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case SPI2:
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI2RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI2RST);
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break;
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case SPI3:
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI3RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI3RST);
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break;
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}
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}
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