electronics
/
libopencm3
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

doc: stm32g0: rcc: fix missing/typod param names

This commit is contained in:
Karl Palsson 2019-06-12 23:20:59 +00:00
parent 9f58ad4393
commit 209dea96e7
1 changed files with 6 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/stm32/g0/rcc.c
View File

@ -382,7 +382,7 @@ void rcc_enable_pllr(bool enable)
/** /**
* @brief Configure APB peripheral clock prescaler * @brief Configure APB peripheral clock prescaler
* @param[in] APB clock prescaler value @ref rcc_cfgr_ppre * @param[in] ppre APB clock prescaler value @ref rcc_cfgr_ppre
*/ */
void rcc_set_ppre(uint32_t ppre) void rcc_set_ppre(uint32_t ppre)
{ {
@ -395,7 +395,7 @@ void rcc_set_ppre(uint32_t ppre)
/** /**
* @brief Configure AHB peripheral clock prescaler * @brief Configure AHB peripheral clock prescaler
* @param[in] AHB clock prescaler value @ref rcc_cfgr_hpre * @param[in] hpre AHB clock prescaler value @ref rcc_cfgr_hpre
*/ */
void rcc_set_hpre(uint32_t hpre) void rcc_set_hpre(uint32_t hpre)
{ {
@ -408,7 +408,7 @@ void rcc_set_hpre(uint32_t hpre)
/** /**
* @brief Configure HSI16 clock division factor to feed SYSCLK * @brief Configure HSI16 clock division factor to feed SYSCLK
* @param[in] HSYSSIS clock division factor @ref rcc_cr_hsidiv * @param[in] hsidiv HSYSSIS clock division factor @ref rcc_cr_hsidiv
*/ */
void rcc_set_hsisys_div(uint32_t hsidiv) void rcc_set_hsisys_div(uint32_t hsidiv)
{ {
@ -421,7 +421,7 @@ void rcc_set_hsisys_div(uint32_t hsidiv)
/** /**
* @brief Configure mco prescaler. * @brief Configure mco prescaler.
* @param[in] mcore prescaler value @ref rcc_cfgr_mcopre * @param[in] mcopre prescaler value @ref rcc_cfgr_mcopre
*/ */
void rcc_set_mcopre(uint32_t mcopre) void rcc_set_mcopre(uint32_t mcopre)
{ {
@ -434,7 +434,7 @@ void rcc_set_mcopre(uint32_t mcopre)
/** /**
* @brief Setup sysclock with desired source (HSE/HSI/PLL/LSE/LSI). taking care of flash/pwr and src configuration * @brief Setup sysclock with desired source (HSE/HSI/PLL/LSE/LSI). taking care of flash/pwr and src configuration
* @param rcc_clock_scale with desired parameters * @param clock rcc_clock_scale with desired parameters
*/ */
void rcc_clock_setup(const struct rcc_clock_scale *clock) void rcc_clock_setup(const struct rcc_clock_scale *clock)
{ {
@ -497,6 +497,7 @@ void rcc_set_rng_clk_div(uint32_t rng_div)
/** /**
* @brief Set the peripheral clock source * @brief Set the peripheral clock source
* @param periph peripheral of choice, eg XXX_BASE
* @param sel periphral clock source * @param sel periphral clock source
*/ */
void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel) void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel)