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stm32f3: rcc: Correct name of pll multiplier helper. 

This function was badly copied and pasted from the f4 library, where there are
two functions, rcc_set_main_pll_hsi and rcc_set_main_pll_hse which combine
source, multipliers, dividers and other pll factors.

On F3, (not all of them, but the ones we support now), the function as
implemented has nothing to do with hsi / hse, and instead is simply selecting
the PLL multiplier.
This commit is contained in:
Karl Palsson 2015-10-18 23:22:21 +00:00
parent 10ef294e5d
commit 129a874cf8
2 changed files with 3 additions and 3 deletions
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2
include/libopencm3/stm32/f3/rcc.h
View File

@ -592,7 +592,7 @@ void rcc_set_pll_source(uint32_t pllsrc);
void rcc_set_ppre2(uint32_t ppre2);
void rcc_set_ppre1(uint32_t ppre1);
void rcc_set_hpre(uint32_t hpre);
void rcc_set_main_pll_hsi(uint32_t pll);
void rcc_set_pll_multiplier(uint32_t pll);
uint32_t rcc_get_system_clock_source(void);
void rcc_backupdomain_reset(void);
void rcc_clock_setup_hsi(const clock_scale_t *clock);

4
lib/stm32/f3/rcc.c
View File

@ -366,7 +366,7 @@ void rcc_set_hpre(uint32_t hpre)
}
void rcc_set_main_pll_hsi(uint32_t pll)
void rcc_set_pll_multiplier(uint32_t pll)
{
RCC_CFGR = (~RCC_CFGR_PLLMUL_MASK & RCC_CFGR) |
(pll << RCC_CFGR_PLLMUL_SHIFT);
@ -392,7 +392,7 @@ void rcc_clock_setup_hsi(const clock_scale_t *clock)
rcc_osc_off(PLL);
rcc_wait_for_osc_not_ready(PLL);
rcc_set_pll_source(clock->pllsrc);
rcc_set_main_pll_hsi(clock->pll);
rcc_set_pll_multiplier(clock->pll);
/* Enable PLL oscillator and wait for it to stabilize. */
rcc_osc_on(PLL);
rcc_wait_for_osc_ready(PLL);