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stm32l0: commonize PWR definitions and add to l0

This commit is contained in:
Robin Kreis 2015-05-21 10:45:53 +02:00 committed by Karl Palsson
parent 0a76a24286
commit 112cf5d085
8 changed files with 137 additions and 76 deletions
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93
include/libopencm3/stm32/common/pwr_common_l01.h Normal file
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@ -0,0 +1,93 @@
/** @addtogroup pwr_defines
@author @htmlonly &copy; @endhtmlonly 2011 Stephen Caudle <scaudle@doceme.com>
@author @htmlonly &copy; @endhtmlonly 2012 Karl Palsson <karlp@tweak.net.au>
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
* Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_PWR_COMMON_L01_H
#define LIBOPENCM3_PWR_COMMON_L01_H
#include <libopencm3/stm32/common/pwr_common_all.h>
/* --- PWR_CR values ------------------------------------------------------- */
/* Bits [31:15]: Reserved */
/* LPRUN: Low power run mode */
#define PWR_CR_LPRUN (1 << 14)
/* VOS[12:11]: Regulator voltage scaling output selection */
#define PWR_CR_VOS_LSB 11
/** @defgroup pwr_vos Voltage Scaling Output level selection
@ingroup pwr_defines
@{*/
#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB)
/**@}*/
#define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB)
/* FWU: Fast wakeup */
#define PWR_CR_FWU (1 << 10)
/* ULP: Ultralow power mode */
#define PWR_CR_ULP (1 << 9)
/* LPSDSR: Low-power deepsleep/sleep/low power run */
#define PWR_CR_LPSDSR (1 << 0) /* masks common PWR_CR_LPDS */
/* --- PWR_CSR values ------------------------------------------------------- */
/* EWUP2: Enable WKUP2 pin */
#define PWR_CSR_EWUP2 (1 << 9)
/* EWUP1: Enable WKUP1 pin */
#define PWR_CSR_EWUP1 PWR_CSR_EWUP
/* REGLPF : Regulator LP flag */
#define PWR_CSR_REGLPF (1 << 5)
/* VOSF: Voltage Scaling select flag */
#define PWR_CSR_VOSF (1 << 4)
/* VREFINTRDYF: Internal voltage reference (VREFINT) ready flag */
#define PWR_CSR_VREFINTRDYF (1 << 3)
/* --- Function prototypes ------------------------------------------------- */
typedef enum {
RANGE1,
RANGE2,
RANGE3,
} vos_scale_t;
BEGIN_DECLS
void pwr_set_vos_scale(vos_scale_t scale);
END_DECLS
#endif

37
include/libopencm3/stm32/l0/pwr.h Normal file
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@ -0,0 +1,37 @@
/** @defgroup pwr_defines PWR Defines
*
* @brief <b>Defined Constants and Types for the STM32L0xx PWR Control</b>
*
* @ingroup STM32L0xx_defines
*
* @version 1.0.0
*
* @date 21 May 2015
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_PWR_H
#define LIBOPENCM3_PWR_H
#include <libopencm3/stm32/common/pwr_common_l01.h>
#endif

61
include/libopencm3/stm32/l1/pwr.h
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@ -36,76 +36,17 @@ LGPL License Terms @ref lgpl_license
#ifndef LIBOPENCM3_PWR_H
#define LIBOPENCM3_PWR_H
#include <libopencm3/stm32/common/pwr_common_all.h>
#include <libopencm3/stm32/common/pwr_common_l01.h>
/*
* This file extends the common STM32 version with definitions only
* applicable to the STM32L1 series of devices.
*/
/* --- PWR_CR values ------------------------------------------------------- */
/* Bits [31:15]: Reserved */
/* LPRUN: Low power run mode */
#define PWR_CR_LPRUN (1 << 14)
/* VOS[12:11]: Regulator voltage scaling output selection */
#define PWR_CR_VOS_LSB 11
/** @defgroup pwr_vos Voltage Scaling Output level selection
@ingroup pwr_defines
@{*/
#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB)
#define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB)
/**@}*/
#define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB)
/* FWU: Fast wakeup */
#define PWR_CR_FWU (1 << 10)
/* ULP: Ultralow power mode */
#define PWR_CR_ULP (1 << 9)
/* LPSDSR: Low-power deepsleep/sleep/low power run */
#define PWR_CR_LPSDSR (1 << 0) /* masks common PWR_CR_LPDS */
/* --- PWR_CSR values ------------------------------------------------------- */
/* Bits [31:11]: Reserved */
/* EWUP3: Enable WKUP3 pin */
#define PWR_CSR_EWUP3 (1 << 10)
/* EWUP2: Enable WKUP2 pin */
#define PWR_CSR_EWUP2 (1 << 9)
/* EWUP1: Enable WKUP1 pin */
#define PWR_CSR_EWUP1 PWR_CSR_EWUP
/* REGLPF : Regulator LP flag */
#define PWR_CSR_REGLPF (1 << 5)
/* VOSF: Voltage Scaling select flag */
#define PWR_CSR_VOSF (1 << 4)
/* VREFINTRDYF: Internal voltage reference (VREFINT) ready flag */
#define PWR_CSR_VREFINTRDYF (1 << 3)
/* --- Function prototypes ------------------------------------------------- */
typedef enum {
RANGE1,
RANGE2,
RANGE3,
} vos_scale_t;
BEGIN_DECLS
void pwr_set_vos_scale(vos_scale_t scale);
END_DECLS
#endif

2
include/libopencm3/stm32/pwr.h
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@ -32,6 +32,8 @@
# include <libopencm3/stm32/f4/pwr.h>
#elif defined(STM32L1)
# include <libopencm3/stm32/l1/pwr.h>
#elif defined(STM32L0)
# include <libopencm3/stm32/l0/pwr.h>
#else
# error "stm32 family not defined."
#endif

2
lib/stm32/common/pwr_common_all.c
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@ -1,4 +1,4 @@
/** @addtogroup pwr_file PWR
/** @addtogroup pwr_file
@author @htmlonly &copy; @endhtmlonly 2012
Ken Sarkies <ksarkies@internode.on.net>

15
lib/stm32/l1/pwr.c → lib/stm32/common/pwr_common_l01.c
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@ -1,19 +1,6 @@
/** @defgroup pwr_file PWR
*
* @ingroup STM32L1xx
*
* @brief <b>libopencm3 STM32L1xx Power Control</b>
*
* @version 1.0.0
/** @addtogroup pwr_file
*
* @author @htmlonly &copy; @endhtmlonly 2012 Karl Palsson <karlp@tweak.net.au>
*
* @date 4 March 2013
*
* This library supports the power control system for the
* STM32L1 series of ARM Cortex Microcontrollers by ST Microelectronics.
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.

1
lib/stm32/l0/Makefile
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@ -36,6 +36,7 @@ CFLAGS += $(DEBUG_FLAGS)
ARFLAGS = rcs
OBJS = gpio.o rcc.o
OBJS += pwr_common_all.o pwr_common_l01.o
OBJS += gpio_common_all.o gpio_common_f0234.o rcc_common_all.o
OBJS += crs_common_all.o

2
lib/stm32/l1/Makefile
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@ -39,7 +39,7 @@ OBJS += crc_common_all.o dac_common_all.o
OBJS += dma_common_l1f013.o
OBJS += gpio_common_all.o gpio_common_f0234.o
OBJS += i2c_common_all.o iwdg_common_all.o
OBJS += pwr_common_all.o pwr.o rtc_common_l1f024.o
OBJS += pwr_common_all.o pwr_common_l01.o rtc_common_l1f024.o
OBJS += spi_common_all.o spi_common_l1f124.o timer_common_all.o
OBJS += usart_common_all.o usart_common_f124.o
OBJS += exti_common_all.o