electronics
/
libopencm3
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

stm32: support i2c3 properly 

I2C3 is on many parts, but wasn't properly supported with the register
definitions.  Declare them centrally, just depending on the memorymap
defining them. On some parts, the rcc bits were defined, but not the
base registers.

Fixes: https://github.com/libopencm3/libopencm3/issues/820
This commit is contained in:
Karl Palsson 2018-07-29 20:53:38 +00:00
parent b8ede60d9d
commit 0e58ee2f65
7 changed files with 34 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
include/libopencm3/stm32/common/i2c_common_v1.h
View File

@ -47,6 +47,9 @@ specific memorymap.h header before including this header file.*/
@{*/
#define I2C1 I2C1_BASE
#define I2C2 I2C2_BASE
#ifdef I2C3_BASE
#define I2C3 I2C3_BASE
#endif
/**@}*/
/* --- I2C registers ------------------------------------------------------- */
@ -96,6 +99,19 @@ specific memorymap.h header before including this header file.*/
#define I2C1_TRISE I2C_TRISE(I2C1)
#define I2C2_TRISE I2C_TRISE(I2C2)
/* Not all parts have i2c3 */
#ifdef I2C3_BASE
#define I2C3_CR1 I2C_CR1(I2C3)
#define I2C3_CR2 I2C_CR2(I2C3)
#define I2C3_OAR1 I2C_OAR1(I2C3)
#define I2C3_OAR2 I2C_OAR2(I2C3)
#define I2C3_DR I2C_DR(I2C3)
#define I2C3_SR1 I2C_SR1(I2C3)
#define I2C3_SR2 I2C_SR2(I2C3)
#define I2C3_CCR I2C_CCR(I2C3)
#define I2C3_TRISE I2C_TRISE(I2C3)
#endif
/* --- I2Cx_CR1 values ----------------------------------------------------- */
/* SWRST: Software reset */

16
include/libopencm3/stm32/common/i2c_common_v2.h
View File

@ -43,6 +43,9 @@ specific memorymap.h header before including this header file.*/
* @{*/
#define I2C1 I2C1_BASE
#define I2C2 I2C2_BASE
#ifdef I2C3_BASE
#define I2C3 I2C3_BASE
#endif
/**@}*/
/* --- I2C registers ------------------------------------------------------- */
@ -102,6 +105,19 @@ specific memorymap.h header before including this header file.*/
#define I2C1_TXDR I2C_TXDR(I2C1)
#define I2C2_TXDR I2C_TXDR(I2C2)
/* Not all parts have i2c3 */
#ifdef I2C3_BASE
#define I2C3_CR1 I2C_CR1(I2C3)
#define I2C3_CR2 I2C_CR2(I2C3)
#define I2C3_OAR1 I2C_OAR1(I2C3)
#define I2C3_OAR2 I2C_OAR2(I2C3)
#define I2C3_DR I2C_DR(I2C3)
#define I2C3_SR1 I2C_SR1(I2C3)
#define I2C3_SR2 I2C_SR2(I2C3)
#define I2C3_CCR I2C_CCR(I2C3)
#define I2C3_TRISE I2C_TRISE(I2C3)
#endif
/* --- I2Cx_CR1 values ----------------------------------------------------- */
/* PECEN: PEC enable */

2
include/libopencm3/stm32/f2/i2c.h
View File

@ -35,8 +35,6 @@ LGPL License Terms @ref lgpl_license
/**@{*/
#define I2C3 I2C3_BASE
/**@}*/
#endif

1
include/libopencm3/stm32/f3/memorymap.h
View File

@ -64,6 +64,7 @@
/* PERIPH_BASE_APB1 + 0x6C00 (0x4000 6C00 - 0x4000 6FFF): Reserved */
#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
#define I2C3_BASE (PERIPH_BASE_APB1 + 0x7800)
/* PERIPH_BASE_APB1 + 0x7800 (0x4000 7800 - 0x4000 7FFF): Reserved */

2
include/libopencm3/stm32/f4/i2c.h
View File

@ -35,8 +35,6 @@ LGPL License Terms @ref lgpl_license
/**@{*/
#define I2C3 I2C3_BASE
/**@}*/
#endif

1
include/libopencm3/stm32/l0/memorymap.h
View File

@ -51,6 +51,7 @@
#define CRS_BASE (PERIPH_BASE_APB1 + 0x6C00)
#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
#define I2C3_BASE (PERIPH_BASE_APB1 + 0x7800)
#define LPTIM1_BASE (PERIPH_BASE_APB1 + 0x7c00)

2
include/libopencm3/stm32/l4/i2c.h
View File

@ -35,8 +35,6 @@ LGPL License Terms @ref lgpl_license
/**@{*/
#define I2C3 I2C3_BASE
/**@}*/
#endif