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lib/stm32/f4: Coding-style fixes.

This commit is contained in:
Uwe Hermann 2011-11-16 19:41:27 +01:00
parent 50f680f3f7
commit 0d25aa3fcd
5 changed files with 27 additions and 28 deletions
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2
lib/stm32/f4/rcc.c
View File

@ -23,7 +23,7 @@
#include <libopencm3/stm32/f4/pwr.h>
#include <libopencm3/stm32/f4/flash.h>
/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset */
/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */
u32 rcc_ppre1_frequency = 16000000;
u32 rcc_ppre2_frequency = 16000000;

23
lib/stm32/f4/timer.c
View File

@ -126,9 +126,7 @@ void timer_set_mode(u32 timer_peripheral, u8 clock_div,
cr1 = TIM_CR1(timer_peripheral);
cr1 &= ~(TIM_CR1_CKD_CK_INT_MASK |
TIM_CR1_CMS_MASK |
TIM_CR1_DIR_DOWN);
cr1 &= ~(TIM_CR1_CKD_CK_INT_MASK | TIM_CR1_CMS_MASK | TIM_CR1_DIR_DOWN);
cr1 |= clock_div | alignment | direction;
@ -398,7 +396,8 @@ void timer_set_oc_mode(u32 timer_peripheral, enum tim_oc_id oc_id,
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC1M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC1M_FORCE_HIGH;
TIM_CCMR1(timer_peripheral) |=
TIM_CCMR1_OC1M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC1M_PWM1;
@ -429,7 +428,8 @@ void timer_set_oc_mode(u32 timer_peripheral, enum tim_oc_id oc_id,
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC2M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC2M_FORCE_HIGH;
TIM_CCMR1(timer_peripheral) |=
TIM_CCMR1_OC2M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR1(timer_peripheral) |= TIM_CCMR1_OC2M_PWM1;
@ -460,7 +460,8 @@ void timer_set_oc_mode(u32 timer_peripheral, enum tim_oc_id oc_id,
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_FORCE_HIGH;
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC3M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC3M_PWM1;
@ -491,7 +492,8 @@ void timer_set_oc_mode(u32 timer_peripheral, enum tim_oc_id oc_id,
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FORCE_LOW;
break;
case TIM_OCM_FORCE_HIGH:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_FORCE_HIGH;
TIM_CCMR2(timer_peripheral) |=
TIM_CCMR2_OC4M_FORCE_HIGH;
break;
case TIM_OCM_PWM1:
TIM_CCMR2(timer_peripheral) |= TIM_CCMR2_OC4M_PWM1;
@ -916,13 +918,10 @@ u32 timer_get_counter(u32 timer_peripheral)
void timer_set_option(u32 timer_peripheral, u32 option)
{
if (timer_peripheral == TIM2)
{
if (timer_peripheral == TIM2) {
TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}
else if (timer_peripheral == TIM5)
{
} else if (timer_peripheral == TIM5) {
TIM_OR(timer_peripheral) &= ~TIM5_OR_TI4_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}

6
lib/stm32/f4/vector.c
View File

@ -20,7 +20,7 @@
#define WEAK __attribute__ ((weak))
/* Symbols exported by linker script */
/* Symbols exported by the linker script(s): */
extern unsigned _etext, _data, _edata, _ebss, _stack;
void main(void);
@ -221,7 +221,8 @@ void (*const vector_table[]) (void) = {
void reset_handler(void)
{
volatile unsigned *src, *dest;
asm("MSR msp, %0" : : "r"(&_stack));
__asm__("MSR msp, %0" : : "r"(&_stack));
for (src = &_etext, dest = &_data; dest < &_edata; src++, dest++)
*dest = *src;
@ -333,4 +334,3 @@ void null_handler(void)
#pragma weak dcmi_isr = null_handler
#pragma weak cryp_isr = null_handler
#pragma weak hash_rng_isr = null_handler