stm32f1: rcc: Fix number of wait states in comment to match the code
Signed-off-by: Adam Heinrich <adam@adamh.cz>
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@ -744,7 +744,7 @@ void rcc_clock_setup_in_hsi_out_24mhz(void)
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rcc_set_ppre2(RCC_CFGR_PPRE2_HCLK_NODIV); /* Set. 24MHz Max. 24MHz */
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/*
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* Sysclk is (will be) running with 24MHz -> 2 waitstates.
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* Sysclk is (will be) running with 24MHz -> 0 waitstates.
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* 0WS from 0-24MHz
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* 1WS from 24-48MHz
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* 2WS from 48-72MHz
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