stm32f3: Add support for OPAMP
This commit is contained in:
Ben Brewer
Karl Palsson
parent
2a4cf034c7
commit
05f07c1051
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/** @defgroup opamp_defines OPAMP Defines
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*
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* @brief <b>libopencm3 Defined Constants and Types for the STM32F3xx
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* Operational Amplifier module</b>
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*
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* @ingroup STM32F3xx_defines
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*
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* @version 1.0.0
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*
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* @date 22 May 2020
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*
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*LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_OPAMP_H
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#define LIBOPENCM3_OPAMP_H
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/**@{*/
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#define OPAMP1 (OPAMP_BASE + 0x38)
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#define OPAMP2 (OPAMP_BASE + 0x3C)
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#define OPAMP3 (OPAMP_BASE + 0x40)
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#define OPAMP4 (OPAMP_BASE + 0x44)
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/* OpAmp registers */
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/* Control and status register (OPAMPx_CSR) */
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#define OPAMP_CSR(opamp_base) MMIO32((opamp_base) + 0x00)
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#define OPAMP1_CSR OPAMP_CSR(OPAMP1)
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#define OPAMP2_CSR OPAMP_CSR(OPAMP2)
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#define OPAMP3_CSR OPAMP_CSR(OPAMP3)
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#define OPAMP4_CSR OPAMP_CSR(OPAMP4)
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/* OPAMPx_CSR values */
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#define OPAMP_CSR_LOCK (0x1 << 31)
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#define OPAMP_CSR_OUTCAL_MASK (0x1)
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#define OPAMP_CSR_OUTCAL_SHIFT (30)
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#define OPAMP_CSR_OUTCAL_NON_LO_INV (0x0)
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#define OPAMP_CSR_OUTCAL_NON_HI_INV (0x1)
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#define OPAMP_CSR_TSTREF (0x1 << 29)
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#define OPAMP_CSR_TRIMOFFSETN_MASK (0x1f)
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#define OPAMP_CSR_TRIMOFFSETN_SHIFT (24)
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#define OPAMP_CSR_TRIMOFFSETP_MASK (0x1f)
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#define OPAMP_CSR_TRIMOFFSETP_SHIFT (19)
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#define OPAMP_CSR_USER_TRIM (0x1 << 18)
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#define OPAMP_CSR_PGA_GAIN_MASK (0xf)
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#define OPAMP_CSR_PGA_GAIN_SHIFT (14)
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#define OPAMP_CSR_PGA_GAIN_2 (0x0)
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#define OPAMP_CSR_PGA_GAIN_4 (0x1)
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#define OPAMP_CSR_PGA_GAIN_8 (0x2)
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#define OPAMP_CSR_PGA_GAIN_16 (0x3)
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#define OPAMP_CSR_PGA_GAIN_2_MINUS_VM0 (0x8)
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#define OPAMP_CSR_PGA_GAIN_4_MINUS_VM0 (0x9)
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#define OPAMP_CSR_PGA_GAIN_8_MINUS_VM0 (0xa)
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#define OPAMP_CSR_PGA_GAIN_16_MINUS_VM0 (0xb)
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#define OPAMP_CSR_PGA_GAIN_2_MINUS_VM1 (0xc)
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#define OPAMP_CSR_PGA_GAIN_4_MINUS_VM1 (0xd)
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#define OPAMP_CSR_PGA_GAIN_8_MINUS_VM1 (0xe)
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#define OPAMP_CSR_PGA_GAIN_16_MINUS_VM1 (0xf)
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#define OPAMP_CSR_CALSEL_MASK (0x3)
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#define OPAMP_CSR_CALSEL_SHIFT (12)
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#define OPAMP_CSR_CALSEL_3P3_PERCENT (0x0)
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#define OPAMP_CSR_CALSEL_10_PERCENT (0x1)
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#define OPAMP_CSR_CALSEL_50_PERCENT (0x2)
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#define OPAMP_CSR_CALSEL_90_PERCENT (0x3)
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#define OPAMP_CSR_CALON (0x1 << 11)
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#define OPAMP_CSR_VPS_SEL_MASK (0x3)
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#define OPAMP_CSR_VPS_SEL_SHIFT (9)
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#define OPAMP1_CSR_VPS_SEL_PA7 (0x0)
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#define OPAMP1_CSR_VPS_SEL_PA5 (0x1)
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#define OPAMP1_CSR_VPS_SEL_PA3 (0x2)
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#define OPAMP1_CSR_VPS_SEL_PA1 (0x3)
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#define OPAMP2_CSR_VPS_SEL_PD14 (0x0)
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#define OPAMP2_CSR_VPS_SEL_PB14 (0x1)
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#define OPAMP2_CSR_VPS_SEL_PB0 (0x2)
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#define OPAMP2_CSR_VPS_SEL_PA7 (0x3)
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#define OPAMP3_CSR_VPS_SEL_PB13 (0x0)
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#define OPAMP3_CSR_VPS_SEL_PA5 (0x1)
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#define OPAMP3_CSR_VPS_SEL_PA1 (0x2)
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#define OPAMP3_CSR_VPS_SEL_PB0 (0x3)
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#define OPAMP4_CSR_VPS_SEL_PD11 (0x0)
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#define OPAMP4_CSR_VPS_SEL_PB11 (0x1)
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#define OPAMP4_CSR_VPS_SEL_PA4 (0x2)
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#define OPAMP4_CSR_VPS_SEL_PB13 (0x3)
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#define OPAMP_CSR_VMS_SEL_MASK (0x1)
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#define OPAMP_CSR_VMS_SEL_SHIFT (8)
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#define OPAMP1_CSR_VMS_SEL_PC5 (0x0)
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#define OPAMP1_CSR_VMS_SEL_PA3 (0x1)
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#define OPAMP2_CSR_VMS_SEL_PC5 (0x0)
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#define OPAMP2_CSR_VMS_SEL_PA5 (0x1)
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#define OPAMP3_CSR_VMS_SEL_PB10 (0x0)
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#define OPAMP3_CSR_VMS_SEL_PB2 (0x1)
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#define OPAMP4_CSR_VMS_SEL_PB10 (0x0)
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#define OPAMP4_CSR_VMS_SEL_PD8 (0x1)
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#define OPAMP_CSR_TCM_EN (0x1 << 7)
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#define OPAMP_CSR_VM_SEL_MASK (0x3)
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#define OPAMP_CSR_VM_SEL_SHIFT (5)
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#define OPAMP_CSR_VM_SEL_PGA_MODE (0x2)
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#define OPAMP_CSR_VM_SEL_FOLLOWER_MODE (0x3)
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#define OPAMP1_CSR_VM_SEL_PC5 (0x0)
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#define OPAMP1_CSR_VM_SEL_PA3 (0x1)
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#define OPAMP2_CSR_VM_SEL_PC5 (0x0)
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#define OPAMP2_CSR_VM_SEL_PA5 (0x1)
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#define OPAMP3_CSR_VM_SEL_PB10 (0x0)
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#define OPAMP3_CSR_VM_SEL_PB2 (0x1)
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#define OPAMP4_CSR_VM_SEL_PB10 (0x0)
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#define OPAMP4_CSR_VM_SEL_PD8 (0x1)
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#define OPAMP_CSR_VP_SEL_MASK (0x3)
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#define OPAMP_CSR_VP_SEL_SHIFT (2)
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#define OPAMP1_CSR_VP_SEL_PA7 (0x0)
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#define OPAMP1_CSR_VP_SEL_PA5 (0x1)
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#define OPAMP1_CSR_VP_SEL_PA3 (0x2)
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#define OPAMP1_CSR_VP_SEL_PA1 (0x3)
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#define OPAMP2_CSR_VP_SEL_PD14 (0x0)
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#define OPAMP2_CSR_VP_SEL_PB14 (0x1)
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#define OPAMP2_CSR_VP_SEL_PB0 (0x2)
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#define OPAMP2_CSR_VP_SEL_PA7 (0x3)
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#define OPAMP3_CSR_VP_SEL_PB13 (0x0)
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#define OPAMP3_CSR_VP_SEL_PA5 (0x1)
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#define OPAMP3_CSR_VP_SEL_PA1 (0x2)
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#define OPAMP3_CSR_VP_SEL_PB0 (0x3)
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#define OPAMP4_CSR_VP_SEL_PD11 (0x0)
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#define OPAMP4_CSR_VP_SEL_PB11 (0x1)
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#define OPAMP4_CSR_VP_SEL_PA4 (0x2)
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#define OPAMP4_CSR_VP_SEL_PB13 (0x3)
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#define OPAMP_CSR_FORCE_VP (0x1 << 1)
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#define OPAMP_CSR_EN (0x1 << 0)
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BEGIN_DECLS
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void opamp_enable(uint32_t base);
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void opamp_disable(uint32_t base);
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void opamp_lock(uint32_t base);
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void opamp_set_calsel(uint32_t base, uint32_t calsel);
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bool opamp_read_outcal(uint32_t base);
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void opamp_tstref_enable(uint32_t base);
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void opamp_tstref_disable(uint32_t base);
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void opamp_force_vp_enable(uint32_t base);
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void opamp_force_vp_disable(uint32_t base);
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void opamp_cal_enable(uint32_t base);
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void opamp_cal_disable(uint32_t base);
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void opamp_trimoffsetn_set(uint32_t base, uint32_t trim);
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void opamp_trimoffsetp_set(uint32_t base, uint32_t trim);
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void opamp_user_trim_enable(uint32_t base);
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void opamp_user_trim_disable(uint32_t base);
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void opamp_pga_gain_select(uint32_t base, uint32_t gain);
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void opamp_vp_select(uint32_t base, uint32_t vp);
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void opamp_vm_select(uint32_t base, uint32_t vm);
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void opamp_vps_select(uint32_t base, uint32_t vps);
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void opamp_vms_select(uint32_t base, uint32_t vms);
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void opamp_tcm_enable(uint32_t base);
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void opamp_tcm_disable(uint32_t base);
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END_DECLS
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/**@}*/
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#endif
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@ -0,0 +1,27 @@
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/* This provides unification of code over STM32 subfamilies */
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/memorymap.h>
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#if defined(STM32F3)
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# include <libopencm3/stm32/f3/opamp.h>
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#else
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# error "stm32 family not defined."
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#endif
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@ -46,6 +46,7 @@ OBJS += flash.o flash_common_all.o flash_common_f.o
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OBJS += gpio_common_all.o gpio_common_f0234.o
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OBJS += i2c_common_v2.o
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OBJS += iwdg_common_all.o
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OBJS += opamp.o
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OBJS += pwr_common_v1.o
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OBJS += rcc.o rcc_common_all.o
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OBJS += spi_common_all.o spi_common_v2.o
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@ -0,0 +1,156 @@
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/** @defgroup opamp_file OPAMP
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*
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* @ingroup STM32F3xx
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*
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* @brief <b>libopencm3 STM32F3xx OPAMP</b>
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*
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* @version 1.0.0
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*
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* @date 22 May 2020
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#include <libopencm3/stm32/opamp.h>
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void opamp_enable(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_EN;
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}
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void opamp_disable(uint32_t base)
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{
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OPAMP_CSR(base) &= ~OPAMP_CSR_EN;
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}
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void opamp_lock(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_LOCK;
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}
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void opamp_set_calsel(uint32_t base, uint32_t calsel)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_CALSEL_MASK << OPAMP_CSR_CALSEL_SHIFT);
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OPAMP_CSR(base) |= calsel << OPAMP_CSR_CALSEL_SHIFT;
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}
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bool opamp_read_outcal(uint32_t base)
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{
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return (OPAMP_CSR(base) >> OPAMP_CSR_OUTCAL_SHIFT)
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& OPAMP_CSR_OUTCAL_MASK;
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}
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void opamp_tcm_enable(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_TCM_EN;
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}
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void opamp_tcm_disable(uint32_t base)
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{
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OPAMP_CSR(base) &= ~OPAMP_CSR_TCM_EN;
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}
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void opamp_force_vp_enable(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_FORCE_VP;
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}
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void opamp_force_vp_disable(uint32_t base)
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{
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OPAMP_CSR(base) &= ~OPAMP_CSR_FORCE_VP;
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}
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void opamp_cal_enable(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_CALON;
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}
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void opamp_cal_disable(uint32_t base)
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{
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OPAMP_CSR(base) &= ~OPAMP_CSR_CALON;
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}
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void opamp_trimoffsetn_set(uint32_t base, uint32_t trim)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_TRIMOFFSETN_MASK
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<< OPAMP_CSR_TRIMOFFSETN_SHIFT);
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OPAMP_CSR(base) |= trim << OPAMP_CSR_TRIMOFFSETN_SHIFT;
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}
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void opamp_trimoffsetp_set(uint32_t base, uint32_t trim)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_TRIMOFFSETP_MASK
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<< OPAMP_CSR_TRIMOFFSETP_SHIFT);
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OPAMP_CSR(base) |= trim << OPAMP_CSR_TRIMOFFSETP_SHIFT;
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}
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void opamp_user_trim_enable(uint32_t base)
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{
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OPAMP_CSR(base) |= OPAMP_CSR_USER_TRIM;
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}
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void opamp_user_trim_disable(uint32_t base)
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{
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OPAMP_CSR(base) &= ~OPAMP_CSR_USER_TRIM;
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}
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void opamp_pga_gain_select(uint32_t base, uint32_t gain)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_PGA_GAIN_MASK
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<< OPAMP_CSR_PGA_GAIN_SHIFT);
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OPAMP_CSR(base) |= gain << OPAMP_CSR_PGA_GAIN_SHIFT;
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}
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void opamp_vp_select(uint32_t base, uint32_t vp)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_VP_SEL_MASK
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<< OPAMP_CSR_VP_SEL_SHIFT);
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OPAMP_CSR(base) |= vp << OPAMP_CSR_VP_SEL_SHIFT;
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}
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void opamp_vm_select(uint32_t base, uint32_t vm)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_VM_SEL_MASK
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<< OPAMP_CSR_VM_SEL_SHIFT);
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OPAMP_CSR(base) |= vm << OPAMP_CSR_VM_SEL_SHIFT;
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}
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void opamp_vps_select(uint32_t base, uint32_t vps)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_VPS_SEL_MASK
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<< OPAMP_CSR_VPS_SEL_SHIFT);
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OPAMP_CSR(base) |= vps << OPAMP_CSR_VPS_SEL_SHIFT;
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}
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void opamp_vms_select(uint32_t base, uint32_t vms)
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{
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OPAMP_CSR(base) &= ~(OPAMP_CSR_VMS_SEL_MASK
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<< OPAMP_CSR_VMS_SEL_SHIFT);
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OPAMP_CSR(base) |= vms << OPAMP_CSR_VMS_SEL_SHIFT;
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}
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/**@}*/
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