2010-05-03 12:17:07 +00:00
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/*
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2010-12-30 12:19:25 +00:00
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* This file is part of the libopencm3 project.
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2010-05-03 12:17:07 +00:00
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENSTM32_WWDG_H
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#define LIBOPENSTM32_WWDG_H
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2010-12-30 01:23:51 +00:00
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#include <stm32/memorymap.h>
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2010-12-29 23:53:52 +00:00
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#include <cm3/common.h>
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2010-05-03 12:17:07 +00:00
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/* --- WWDG registers ------------------------------------------------------ */
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/* Control register (WWDG_CR) */
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#define WWDG_CR MMIO32(WWDG_BASE + 0x00)
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/* Configuration register (WWDG_CFR) */
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#define WWDG_CFR MMIO32(WWDG_BASE + 0x04)
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/* Status register (WWDG_SR) */
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#define WWDG_SR MMIO32(WWDG_BASE + 0x08)
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/* --- WWDG_CR values ------------------------------------------------------ */
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/* WDGA: Activation bit */
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#define WWDG_CR_WDGA (1 << 7)
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/* T[6:0]: 7-bit counter (MSB to LSB) */
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#define WWDG_CR_T_LSB 0
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#define WWDG_CR_T0 (1 << 0)
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#define WWDG_CR_T1 (1 << 1)
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#define WWDG_CR_T2 (1 << 2)
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#define WWDG_CR_T3 (1 << 3)
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#define WWDG_CR_T4 (1 << 4)
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#define WWDG_CR_T5 (1 << 5)
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#define WWDG_CR_T6 (1 << 6)
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/* --- WWDG_CFR values ----------------------------------------------------- */
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/* EWI: Early wakeup interrupt */
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#define WWDG_CFR_EWI (1 << 9)
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/* WDGTB[8:7]: Timer base */
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#define WWDG_CFR_WDGTB_LSB 7
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#define WWDG_CFR_WDGTB_CK_DIV1 0x0
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#define WWDG_CFR_WDGTB_CK_DIV2 0x1
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#define WWDG_CFR_WDGTB_CK_DIV4 0x2
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#define WWDG_CFR_WDGTB_CK_DIV8 0x3
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/* W[6:0]: 7-bit window value */
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#define WWDG_CFG_W_LSB 0
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/* --- WWDG_SR values ------------------------------------------------------ */
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/* EWIF: Early wakeup interrupt flag */
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#define WWDG_SR_EWIF (1 << 0)
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/* --- WWDG funtion prototypes---------------------------------------------- */
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#endif
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