133 lines
3.0 KiB
C
133 lines
3.0 KiB
C
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2012 Benjamin Vernoux <titanmkd@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/lpc43xx/ssp.h>
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#include <libopencm3/lpc43xx/cgu.h>
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#define CGU_SRC_32K 0x00
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#define CGU_SRC_IRC 0x01
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#define CGU_SRC_ENET_RX 0x02
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#define CGU_SRC_ENET_TX 0x03
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#define CGU_SRC_GP_CLKIN 0x04
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#define CGU_SRC_XTAL 0x06
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#define CGU_SRC_PLL0USB 0x07
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#define CGU_SRC_PLL0AUDIO 0x08
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#define CGU_SRC_PLL1 0x09
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#define CGU_SRC_IDIVA 0x0C
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#define CGU_SRC_IDIVB 0x0D
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#define CGU_SRC_IDIVC 0x0E
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#define CGU_SRC_IDIVD 0x0F
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#define CGU_SRC_IDIVE 0x10
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#define CGU_AUTOBLOCK_CLOCK_BIT 11
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#define CGU_BASE_CLK_SEL_SHIFT 24 /* clock source selection (5 bits) */
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/* Disable SSP */
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void ssp_disable(ssp_num_t ssp_num)
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{
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u32 ssp_port;
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if(ssp_num == SSP0_NUM)
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{
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ssp_port = SSP0;
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}else
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{
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ssp_port = SSP1;
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}
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/* Disable SSP */
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SSP_CR1(ssp_port) = 0x0;
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}
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/*
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* SSP Init function
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*/
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void ssp_init(ssp_num_t ssp_num,
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ssp_datasize_t data_size,
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ssp_frame_format_t frame_format,
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ssp_cpol_cpha_t cpol_cpha_format,
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u8 serial_clock_rate,
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ssp_mode_t mode,
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ssp_master_slave_t master_slave,
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ssp_slave_option_t slave_option)
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{
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u32 ssp_port;
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u32 clock;
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if(ssp_num == SSP0_NUM)
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{
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ssp_port = SSP0;
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}else
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{
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ssp_port = SSP1;
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}
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/* use PLL1 as clock source for SSP1 */
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CGU_BASE_SSP1_CLK = (CGU_SRC_PLL1<<CGU_BASE_CLK_SEL_SHIFT) | (1<<CGU_AUTOBLOCK_CLOCK_BIT);
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/* Disable SSP before to configure it */
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SSP_CR1(ssp_port) = 0x0;
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/* Configure SSP */
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clock = serial_clock_rate;
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SSP_CR0(ssp_port) = (data_size | frame_format | cpol_cpha_format | (clock<<8) );
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/* Enable SSP */
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SSP_CR1(ssp_port) = (SSP_ENABLE | mode | master_slave | slave_option);
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}
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/*
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* This Function Wait until Data RX Ready, and return Data Read from SSP.
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*/
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u16 ssp_read(ssp_num_t ssp_num)
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{
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u32 ssp_port;
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if(ssp_num == SSP0_NUM)
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{
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ssp_port = SSP0;
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}else
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{
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ssp_port = SSP1;
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}
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/* Wait Until Data Received (Rx FIFO not Empty) */
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while( (SSP_SR(ssp_port) & SSP_SR_RNE) == 0);
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return SSP_DR(ssp_port);
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}
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/* This Function Wait Data TX Ready, and Write Data to SSP */
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void ssp_write(ssp_num_t ssp_num, u16 data)
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{
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u32 ssp_port;
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if(ssp_num == SSP0_NUM)
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{
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ssp_port = SSP0;
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}else
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{
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ssp_port = SSP1;
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}
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/* Wait Until FIFO not full */
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while( (SSP_SR(ssp_port) & SSP_SR_TNF) == 0);
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SSP_DR(ssp_port) = data;
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}
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