875d43e72b
Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
61 lines
2.3 KiB
C
61 lines
2.3 KiB
C
/*
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* Ocelot-C Board Register Definitions
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*
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* (C) 2002 Momentum Computer Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Louis Hamilton, Red Hat, Inc.
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* hamilton@redhat.com [MIPS64 modifications]
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*/
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#ifndef __OCELOT_C_FPGA_H__
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#define __OCELOT_C_FPGA_H__
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#include <linux/config.h>
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#ifdef CONFIG_64BIT
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#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
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#else
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#define OCELOT_C_CS0_ADDR (0xfc000000)
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#endif
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#define OCELOT_C_REG_BOARDREV 0x0
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#define OCELOT_C_REG_FPGA_REV 0x1
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#define OCELOT_C_REG_FPGA_TYPE 0x2
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#define OCELOT_C_REG_RESET_STATUS 0x3
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#define OCELOT_C_REG_BOARD_STATUS 0x4
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#define OCELOT_C_REG_CPCI_ID 0x5
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#define OCELOT_C_REG_SET 0x6
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#define OCELOT_C_REG_CLR 0x7
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#define OCELOT_C_REG_EEPROM_MODE 0x9
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#define OCELOT_C_REG_INTMASK 0xa
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#define OCELOT_C_REG_INTSTAT 0xb
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#define OCELOT_C_REG_UART_INTMASK 0xc
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#define OCELOT_C_REG_UART_INTSTAT 0xd
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#define OCELOT_C_REG_INTSET 0xe
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#define OCELOT_C_REG_INTCLR 0xf
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#define OCELOT_FPGA_WRITE(x, y) writeb(x, OCELOT_C_CS0_ADDR + OCELOT_C_REG_##y)
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#define OCELOT_FPGA_READ(x) readb(OCELOT_C_CS0_ADDR + OCELOT_C_REG_##x)
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#endif
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