b7dc96d753
Most architectures have fairly simple discontiguous memory - a simple set of successive regions each containing some memory. These can be described simply as a log2 of their maximum size, along with the base address of the first region and the number of regions. The base address is already described by PHYS_PFN_OFFSET, and the number of regions via the MAX_NUMNODES and the number of online nodes. If we then supply the log2 of their maximum size, all the other discontigmem macros can move into generic code. There is one exception: lh7a40x seems to have a more complicated setup; this is left alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
95 lines
3 KiB
C
95 lines
3 KiB
C
/*
|
|
* linux/include/asm-arm/arch-clps711x/memory.h
|
|
*
|
|
* Copyright (C) 1999 ARM Limited
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
|
*/
|
|
#ifndef __ASM_ARCH_MEMORY_H
|
|
#define __ASM_ARCH_MEMORY_H
|
|
|
|
|
|
/*
|
|
* Physical DRAM offset.
|
|
*/
|
|
#define PHYS_OFFSET UL(0xc0000000)
|
|
|
|
/*
|
|
* Virtual view <-> DMA view memory address translations
|
|
* virt_to_bus: Used to translate the virtual address to an
|
|
* address suitable to be passed to set_dma_addr
|
|
* bus_to_virt: Used to convert an address for DMA operations
|
|
* to an address that the kernel can use.
|
|
*/
|
|
|
|
#if defined(CONFIG_ARCH_CDB89712)
|
|
|
|
#define __virt_to_bus(x) (x)
|
|
#define __bus_to_virt(x) (x)
|
|
|
|
#elif defined (CONFIG_ARCH_AUTCPU12)
|
|
|
|
#define __virt_to_bus(x) (x)
|
|
#define __bus_to_virt(x) (x)
|
|
|
|
#else
|
|
|
|
#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
|
|
#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
|
|
|
|
#endif
|
|
|
|
|
|
/*
|
|
* Like the SA1100, the EDB7211 has a large gap between physical RAM
|
|
* banks. In 2.2, the Psion (CL-PS7110) port added custom support for
|
|
* discontiguous physical memory. In 2.4, we can use the standard
|
|
* Linux NUMA support.
|
|
*
|
|
* This is not necessary for EP7211 implementations with only one used
|
|
* memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM.
|
|
*/
|
|
|
|
/*
|
|
* The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211
|
|
* uses only one of the two banks (bank #1). However, even within
|
|
* bank #1, memory is discontiguous.
|
|
*
|
|
* The EDB7211 has two 8MB DRAM areas with 8MB of empty space between
|
|
* them, so we use 24 for the node max shift to get 16MB node sizes.
|
|
*/
|
|
|
|
/*
|
|
* Because of the wide memory address space between physical RAM banks on the
|
|
* SA1100, it's much more convenient to use Linux's NUMA support to implement
|
|
* our memory map representation. Assuming all memory nodes have equal access
|
|
* characteristics, we then have generic discontiguous memory support.
|
|
*
|
|
* Of course, all this isn't mandatory for SA1100 implementations with only
|
|
* one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
|
|
*
|
|
* The nodes are matched with the physical memory bank addresses which are
|
|
* incidentally the same as virtual addresses.
|
|
*
|
|
* node 0: 0xc0000000 - 0xc7ffffff
|
|
* node 1: 0xc8000000 - 0xcfffffff
|
|
* node 2: 0xd0000000 - 0xd7ffffff
|
|
* node 3: 0xd8000000 - 0xdfffffff
|
|
*/
|
|
#define NODE_MEM_SIZE_BITS 24
|
|
|
|
#endif
|
|
|