![Ralf Baechle](/assets/img/avatar_default.png)
Sibyte SOCs only have 32-bit PCI. Due to the sparse use of the address space only the first 1GB of memory is mapped at physical addresses below 1GB. If a system has more than 1GB of memory 32-bit DMA will not be able to reach all of it. For now this patch is good enough to keep Sibyte users happy but it seems eventually something like swiotlb will be needed for Sibyte. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
513 lines
13 KiB
C
513 lines
13 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 - 2000 Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/bug.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/pagemap.h>
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#include <linux/ptrace.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/bootmem.h>
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#include <linux/highmem.h>
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#include <linux/swap.h>
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#include <linux/proc_fs.h>
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#include <linux/pfn.h>
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#include <asm/asm-offsets.h>
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#include <asm/bootinfo.h>
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#include <asm/cachectl.h>
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#include <asm/cpu.h>
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#include <asm/dma.h>
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#include <asm/kmap_types.h>
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#include <asm/mmu_context.h>
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#include <asm/sections.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/tlb.h>
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#include <asm/fixmap.h>
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/* Atomicity and interruptability */
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#ifdef CONFIG_MIPS_MT_SMTC
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#include <asm/mipsmtregs.h>
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#define ENTER_CRITICAL(flags) \
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{ \
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unsigned int mvpflags; \
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local_irq_save(flags);\
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mvpflags = dvpe()
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#define EXIT_CRITICAL(flags) \
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evpe(mvpflags); \
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local_irq_restore(flags); \
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}
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#else
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#define ENTER_CRITICAL(flags) local_irq_save(flags)
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#define EXIT_CRITICAL(flags) local_irq_restore(flags)
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#endif /* CONFIG_MIPS_MT_SMTC */
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DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
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/*
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* We have up to 8 empty zeroed pages so we can map one of the right colour
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* when needed. This is necessary only on R4000 / R4400 SC and MC versions
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* where we have to avoid VCED / VECI exceptions for good performance at
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* any price. Since page is never written to after the initialization we
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* don't have to care about aliases on other CPUs.
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*/
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unsigned long empty_zero_page, zero_page_mask;
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/*
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* Not static inline because used by IP27 special magic initialization code
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*/
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unsigned long setup_zero_pages(void)
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{
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unsigned int order;
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unsigned long size;
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struct page *page;
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if (cpu_has_vce)
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order = 3;
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else
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order = 0;
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empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
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if (!empty_zero_page)
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panic("Oh boy, that early out of memory?");
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page = virt_to_page((void *)empty_zero_page);
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split_page(page, order);
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while (page < virt_to_page((void *)(empty_zero_page + (PAGE_SIZE << order)))) {
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SetPageReserved(page);
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page++;
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}
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size = PAGE_SIZE << order;
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zero_page_mask = (size - 1) & PAGE_MASK;
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return 1UL << order;
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}
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/*
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* These are almost like kmap_atomic / kunmap_atmic except they take an
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* additional address argument as the hint.
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*/
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#define kmap_get_fixmap_pte(vaddr) \
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pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr))
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#ifdef CONFIG_MIPS_MT_SMTC
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static pte_t *kmap_coherent_pte;
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static void __init kmap_coherent_init(void)
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{
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unsigned long vaddr;
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/* cache the first coherent kmap pte */
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vaddr = __fix_to_virt(FIX_CMAP_BEGIN);
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kmap_coherent_pte = kmap_get_fixmap_pte(vaddr);
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}
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#else
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static inline void kmap_coherent_init(void) {}
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#endif
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void *kmap_coherent(struct page *page, unsigned long addr)
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{
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enum fixed_addresses idx;
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unsigned long vaddr, flags, entrylo;
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unsigned long old_ctx;
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pte_t pte;
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int tlbidx;
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BUG_ON(Page_dcache_dirty(page));
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inc_preempt_count();
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idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1);
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#ifdef CONFIG_MIPS_MT_SMTC
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idx += FIX_N_COLOURS * smp_processor_id();
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#endif
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vaddr = __fix_to_virt(FIX_CMAP_END - idx);
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pte = mk_pte(page, PAGE_KERNEL);
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#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
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entrylo = pte.pte_high;
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#else
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entrylo = pte_val(pte) >> 6;
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#endif
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ENTER_CRITICAL(flags);
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old_ctx = read_c0_entryhi();
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write_c0_entryhi(vaddr & (PAGE_MASK << 1));
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write_c0_entrylo0(entrylo);
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write_c0_entrylo1(entrylo);
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#ifdef CONFIG_MIPS_MT_SMTC
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set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte);
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/* preload TLB instead of local_flush_tlb_one() */
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mtc0_tlbw_hazard();
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tlb_probe();
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tlb_probe_hazard();
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tlbidx = read_c0_index();
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mtc0_tlbw_hazard();
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if (tlbidx < 0)
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tlb_write_random();
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else
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tlb_write_indexed();
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#else
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tlbidx = read_c0_wired();
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write_c0_wired(tlbidx + 1);
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write_c0_index(tlbidx);
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mtc0_tlbw_hazard();
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tlb_write_indexed();
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#endif
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tlbw_use_hazard();
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write_c0_entryhi(old_ctx);
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EXIT_CRITICAL(flags);
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return (void*) vaddr;
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}
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#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
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void kunmap_coherent(void)
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{
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#ifndef CONFIG_MIPS_MT_SMTC
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unsigned int wired;
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unsigned long flags, old_ctx;
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ENTER_CRITICAL(flags);
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old_ctx = read_c0_entryhi();
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wired = read_c0_wired() - 1;
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write_c0_wired(wired);
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write_c0_index(wired);
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write_c0_entryhi(UNIQUE_ENTRYHI(wired));
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write_c0_entrylo0(0);
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write_c0_entrylo1(0);
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mtc0_tlbw_hazard();
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tlb_write_indexed();
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tlbw_use_hazard();
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write_c0_entryhi(old_ctx);
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EXIT_CRITICAL(flags);
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#endif
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dec_preempt_count();
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preempt_check_resched();
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}
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void copy_user_highpage(struct page *to, struct page *from,
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unsigned long vaddr, struct vm_area_struct *vma)
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{
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void *vfrom, *vto;
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vto = kmap_atomic(to, KM_USER1);
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if (cpu_has_dc_aliases && page_mapped(from)) {
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vfrom = kmap_coherent(from, vaddr);
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copy_page(vto, vfrom);
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kunmap_coherent();
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} else {
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vfrom = kmap_atomic(from, KM_USER0);
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copy_page(vto, vfrom);
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kunmap_atomic(vfrom, KM_USER0);
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}
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if (((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) ||
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pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK))
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flush_data_cache_page((unsigned long)vto);
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kunmap_atomic(vto, KM_USER1);
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/* Make sure this page is cleared on other CPU's too before using it */
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smp_wmb();
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}
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EXPORT_SYMBOL(copy_user_highpage);
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void copy_to_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr, void *dst, const void *src,
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unsigned long len)
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{
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if (cpu_has_dc_aliases && page_mapped(page)) {
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void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
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memcpy(vto, src, len);
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kunmap_coherent();
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} else {
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memcpy(dst, src, len);
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if (cpu_has_dc_aliases)
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SetPageDcacheDirty(page);
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}
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if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
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flush_cache_page(vma, vaddr, page_to_pfn(page));
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}
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EXPORT_SYMBOL(copy_to_user_page);
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void copy_from_user_page(struct vm_area_struct *vma,
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struct page *page, unsigned long vaddr, void *dst, const void *src,
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unsigned long len)
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{
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if (cpu_has_dc_aliases && page_mapped(page)) {
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void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
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memcpy(dst, vfrom, len);
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kunmap_coherent();
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} else {
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memcpy(dst, src, len);
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if (cpu_has_dc_aliases)
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SetPageDcacheDirty(page);
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}
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}
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EXPORT_SYMBOL(copy_from_user_page);
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#ifdef CONFIG_HIGHMEM
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unsigned long highstart_pfn, highend_pfn;
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pte_t *kmap_pte;
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pgprot_t kmap_prot;
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static void __init kmap_init(void)
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{
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unsigned long kmap_vstart;
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/* cache the first kmap pte */
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kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN);
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kmap_pte = kmap_get_fixmap_pte(kmap_vstart);
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kmap_prot = PAGE_KERNEL;
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}
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#endif /* CONFIG_HIGHMEM */
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void __init fixrange_init(unsigned long start, unsigned long end,
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pgd_t *pgd_base)
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{
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#if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC)
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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int i, j, k;
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unsigned long vaddr;
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vaddr = start;
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i = __pgd_offset(vaddr);
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j = __pud_offset(vaddr);
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k = __pmd_offset(vaddr);
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pgd = pgd_base + i;
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for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) {
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pud = (pud_t *)pgd;
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for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) {
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pmd = (pmd_t *)pud;
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for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) {
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if (pmd_none(*pmd)) {
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pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
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set_pmd(pmd, __pmd((unsigned long)pte));
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if (pte != pte_offset_kernel(pmd, 0))
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BUG();
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}
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vaddr += PMD_SIZE;
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}
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k = 0;
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}
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j = 0;
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}
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#endif
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}
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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static int __init page_is_ram(unsigned long pagenr)
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{
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int i;
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for (i = 0; i < boot_mem_map.nr_map; i++) {
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unsigned long addr, end;
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if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
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/* not usable memory */
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continue;
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addr = PFN_UP(boot_mem_map.map[i].addr);
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end = PFN_DOWN(boot_mem_map.map[i].addr +
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boot_mem_map.map[i].size);
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if (pagenr >= addr && pagenr < end)
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return 1;
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}
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return 0;
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}
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void __init paging_init(void)
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{
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unsigned long max_zone_pfns[MAX_NR_ZONES];
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unsigned long lastpfn;
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pagetable_init();
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#ifdef CONFIG_HIGHMEM
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kmap_init();
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#endif
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kmap_coherent_init();
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
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#endif
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#ifdef CONFIG_ZONE_DMA32
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max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
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#endif
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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lastpfn = max_low_pfn;
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#ifdef CONFIG_HIGHMEM
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max_zone_pfns[ZONE_HIGHMEM] = highend_pfn;
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lastpfn = highend_pfn;
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if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) {
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printk(KERN_WARNING "This processor doesn't support highmem."
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" %ldk highmem ignored\n",
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(highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10));
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max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn;
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lastpfn = max_low_pfn;
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}
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#endif
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free_area_init_nodes(max_zone_pfns);
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}
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static struct kcore_list kcore_mem, kcore_vmalloc;
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#ifdef CONFIG_64BIT
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static struct kcore_list kcore_kseg0;
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#endif
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void __init mem_init(void)
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{
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unsigned long codesize, reservedpages, datasize, initsize;
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unsigned long tmp, ram;
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#ifdef CONFIG_HIGHMEM
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#ifdef CONFIG_DISCONTIGMEM
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#error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet"
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#endif
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max_mapnr = highend_pfn;
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#else
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max_mapnr = max_low_pfn;
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#endif
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high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
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totalram_pages += free_all_bootmem();
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totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */
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reservedpages = ram = 0;
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for (tmp = 0; tmp < max_low_pfn; tmp++)
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if (page_is_ram(tmp)) {
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ram++;
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if (PageReserved(pfn_to_page(tmp)))
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reservedpages++;
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}
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num_physpages = ram;
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#ifdef CONFIG_HIGHMEM
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for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
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struct page *page = pfn_to_page(tmp);
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if (!page_is_ram(tmp)) {
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SetPageReserved(page);
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continue;
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}
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ClearPageReserved(page);
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init_page_count(page);
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__free_page(page);
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totalhigh_pages++;
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}
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totalram_pages += totalhigh_pages;
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num_physpages += totalhigh_pages;
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#endif
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codesize = (unsigned long) &_etext - (unsigned long) &_text;
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datasize = (unsigned long) &_edata - (unsigned long) &_etext;
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initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
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#ifdef CONFIG_64BIT
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if ((unsigned long) &_text > (unsigned long) CKSEG0)
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/* The -4 is a hack so that user tools don't have to handle
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the overflow. */
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kclist_add(&kcore_kseg0, (void *) CKSEG0, 0x80000000 - 4);
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#endif
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kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
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kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
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VMALLOC_END-VMALLOC_START);
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printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
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"%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
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(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
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ram << (PAGE_SHIFT-10),
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codesize >> 10,
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reservedpages << (PAGE_SHIFT-10),
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datasize >> 10,
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initsize >> 10,
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(unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
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}
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#endif /* !CONFIG_NEED_MULTIPLE_NODES */
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void free_init_pages(const char *what, unsigned long begin, unsigned long end)
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{
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unsigned long pfn;
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for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) {
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struct page *page = pfn_to_page(pfn);
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void *addr = phys_to_virt(PFN_PHYS(pfn));
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ClearPageReserved(page);
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init_page_count(page);
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memset(addr, POISON_FREE_INITMEM, PAGE_SIZE);
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__free_page(page);
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totalram_pages++;
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}
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printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10);
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}
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#ifdef CONFIG_BLK_DEV_INITRD
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void free_initrd_mem(unsigned long start, unsigned long end)
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{
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free_init_pages("initrd memory",
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virt_to_phys((void *)start),
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virt_to_phys((void *)end));
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}
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#endif
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void __init_refok free_initmem(void)
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{
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prom_free_prom_memory();
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free_init_pages("unused kernel memory",
|
|
__pa_symbol(&__init_begin),
|
|
__pa_symbol(&__init_end));
|
|
}
|
|
|
|
unsigned long pgd_current[NR_CPUS];
|
|
/*
|
|
* On 64-bit we've got three-level pagetables with a slightly
|
|
* different layout ...
|
|
*/
|
|
#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order)))
|
|
|
|
/*
|
|
* gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER
|
|
* are constants. So we use the variants from asm-offset.h until that gcc
|
|
* will officially be retired.
|
|
*/
|
|
pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER);
|
|
#ifdef CONFIG_64BIT
|
|
#ifdef MODULE_START
|
|
pgd_t module_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER);
|
|
#endif
|
|
pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER);
|
|
#endif
|
|
pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER);
|