![Yong Wang](/assets/img/avatar_default.png)
Use the standard config option CONFIG_PM to enable rtl8192e PM functions. Tested on Samsung N140 and it works fine. Without enabling the PM functions, the box always fails to resume. Signed-off-by: Yong Wang <yong.y.wang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
171 lines
4.5 KiB
C
171 lines
4.5 KiB
C
/*
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Power management interface routines.
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Written by Mariusz Matuszek.
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This code is currently just a placeholder for later work and
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does not do anything useful.
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This is part of rtl8180 OpenSource driver.
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Copyright (C) Andrea Merello 2004 <andreamrl@tiscali.it>
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Released under the terms of GPL (General Public Licence)
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*/
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#include "r8192E.h"
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#include "r8192E_hw.h"
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#include "r8192_pm.h"
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#include "r8190_rtl8256.h"
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int rtl8192E_save_state (struct pci_dev *dev, pm_message_t state)
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{
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printk(KERN_NOTICE "r8192E save state call (state %u).\n", state.event);
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return(-EAGAIN);
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}
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int rtl8192E_suspend (struct pci_dev *pdev, pm_message_t state)
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{
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struct net_device *dev = pci_get_drvdata(pdev);
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struct r8192_priv *priv = ieee80211_priv(dev);
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#ifdef RTL8190P
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u8 ucRegRead;
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#endif
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u32 ulRegRead;
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RT_TRACE(COMP_POWER, "============> r8192E suspend call.\n");
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if (!netif_running(dev))
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goto out_pci_suspend;
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if (dev->netdev_ops->ndo_stop)
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dev->netdev_ops->ndo_stop(dev);
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// dev->stop(dev);
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#if 0
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netif_carrier_off(dev);
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ieee80211_softmac_stop_protocol(priv->ieee80211);
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write_nic_byte(dev,MSR,(read_nic_byte(dev,MSR)&0xfc)|MSR_LINK_NONE);
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if(!priv->ieee80211->bSupportRemoteWakeUp) {
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/* disable tx/rx. In 8185 we write 0x10 (Reset bit),
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* but here we make reference to WMAC and wirte 0x0.
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* 2006.11.21 Emily
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*/
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write_nic_byte(dev, CMDR, 0);
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}
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//disable interrupt
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write_nic_dword(dev,INTA_MASK,0);
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priv->irq_enabled = 0;
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write_nic_dword(dev,ISR,read_nic_dword(dev, ISR));
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/* need to free DM related functions */
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cancel_work_sync(&priv->reset_wq);
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del_timer_sync(&priv->fsync_timer);
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del_timer_sync(&priv->watch_dog_timer);
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cancel_delayed_work(&priv->watch_dog_wq);
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cancel_delayed_work(&priv->update_beacon_wq);
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cancel_work_sync(&priv->qos_activate);
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/* TODO
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#if ((DEV_BUS_TYPE == PCI_INTERFACE) && (HAL_CODE_BASE == RTL8192))
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pHalData->bHwRfOffAction = 2;
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#endif
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*/
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#endif
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// Call MgntActSet_RF_State instead to prevent RF config race condition.
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// By Bruce, 2008-01-17.
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//
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if(!priv->ieee80211->bSupportRemoteWakeUp) {
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MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_INIT);
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// 2006.11.30. System reset bit
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ulRegRead = read_nic_dword(dev, CPU_GEN);
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ulRegRead|=CPU_GEN_SYSTEM_RESET;
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write_nic_dword(dev, CPU_GEN, ulRegRead);
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} else {
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//2008.06.03 for WOL
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write_nic_dword(dev, WFCRC0, 0xffffffff);
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write_nic_dword(dev, WFCRC1, 0xffffffff);
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write_nic_dword(dev, WFCRC2, 0xffffffff);
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#ifdef RTL8190P
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//GPIO 0 = TRUE
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ucRegRead = read_nic_byte(dev, GPO);
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ucRegRead |= BIT0;
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write_nic_byte(dev, GPO, ucRegRead);
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#endif
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//Write PMR register
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write_nic_byte(dev, PMR, 0x5);
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//Disable tx, enanble rx
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write_nic_byte(dev, MacBlkCtrl, 0xa);
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}
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out_pci_suspend:
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RT_TRACE(COMP_POWER, "r8192E support WOL call??????????????????????\n");
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if(priv->ieee80211->bSupportRemoteWakeUp) {
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RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
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}
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netif_device_detach(dev);
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pci_save_state(pdev);
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pci_disable_device(pdev);
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pci_enable_wake(pdev, pci_choose_state(pdev,state),\
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priv->ieee80211->bSupportRemoteWakeUp?1:0);
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pci_set_power_state(pdev,pci_choose_state(pdev,state));
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return 0;
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}
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int rtl8192E_resume (struct pci_dev *pdev)
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{
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struct net_device *dev = pci_get_drvdata(pdev);
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//struct r8192_priv *priv = ieee80211_priv(dev);
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//union iwreq_data wrqu;
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int err;
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u32 val;
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RT_TRACE(COMP_POWER, "================>r8192E resume call.");
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pci_set_power_state(pdev, PCI_D0);
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err = pci_enable_device(pdev);
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if(err) {
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printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
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dev->name);
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return err;
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}
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pci_restore_state(pdev);
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/*
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* Suspend/Resume resets the PCI configuration space, so we have to
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* re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
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* from interfering with C3 CPU state. pci_restore_state won't help
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* here since it only restores the first 64 bytes pci config header.
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*/
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pci_read_config_dword(pdev, 0x40, &val);
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if ((val & 0x0000ff00) != 0) {
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pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
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}
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pci_enable_wake(pdev, PCI_D0, 0);
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if(!netif_running(dev))
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goto out;
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netif_device_attach(dev);
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if (dev->netdev_ops->ndo_open)
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dev->netdev_ops->ndo_open(dev);
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// dev->open(dev);
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out:
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RT_TRACE(COMP_POWER, "<================r8192E resume call.\n");
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return 0;
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}
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int rtl8192E_enable_wake (struct pci_dev *dev, pm_message_t state, int enable)
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{
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printk(KERN_NOTICE "r8192E enable wake call (state %u, enable %d).\n",
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state.event, enable);
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return(-EAGAIN);
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}
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