![Lior Dotan](/assets/img/avatar_default.png)
Remove typedefs from driver Signed-of-by: Lior Dotan <liodot@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
1063 lines
26 KiB
C
1063 lines
26 KiB
C
/***************************************************************************
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* Copyright (c) 2005-2009, Broadcom Corporation.
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*
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* Name: crystalhd_cmds . c
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*
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* Description:
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* BCM70010 Linux driver user command interfaces.
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*
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* HISTORY:
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*
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**********************************************************************
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* This file is part of the crystalhd device driver.
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*
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* This driver is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, version 2 of the License.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver. If not, see <http://www.gnu.org/licenses/>.
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**********************************************************************/
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#include "crystalhd_cmds.h"
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#include "crystalhd_hw.h"
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static struct crystalhd_user *bc_cproc_get_uid(struct crystalhd_cmd *ctx)
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{
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struct crystalhd_user *user = NULL;
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int i;
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for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
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if (!ctx->user[i].in_use) {
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user = &ctx->user[i];
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break;
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}
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}
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return user;
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}
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static int bc_cproc_get_user_count(struct crystalhd_cmd *ctx)
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{
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int i, count = 0;
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for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
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if (ctx->user[i].in_use)
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count++;
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}
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return count;
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}
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static void bc_cproc_mark_pwr_state(struct crystalhd_cmd *ctx)
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{
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int i;
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for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
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if (!ctx->user[i].in_use)
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continue;
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if (ctx->user[i].mode == DTS_DIAG_MODE ||
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ctx->user[i].mode == DTS_PLAYBACK_MODE) {
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ctx->pwr_state_change = 1;
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break;
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}
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}
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}
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static enum BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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int rc = 0, i = 0;
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if (!ctx || !idata) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return BC_STS_INV_ARG;
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}
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if (ctx->user[idata->u_id].mode != DTS_MODE_INV) {
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BCMLOG_ERR("Close the handle first..\n");
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return BC_STS_ERR_USAGE;
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}
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if (idata->udata.u.NotifyMode.Mode == DTS_MONITOR_MODE) {
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ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode;
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return BC_STS_SUCCESS;
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}
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if (ctx->state != BC_LINK_INVALID) {
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BCMLOG_ERR("Link invalid state %d\n", ctx->state);
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return BC_STS_ERR_USAGE;
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}
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/* Check for duplicate playback sessions..*/
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for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
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if (ctx->user[i].mode == DTS_DIAG_MODE ||
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ctx->user[i].mode == DTS_PLAYBACK_MODE) {
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BCMLOG_ERR("multiple playback sessions are not "
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"supported..\n");
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return BC_STS_ERR_USAGE;
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}
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}
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ctx->cin_wait_exit = 0;
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ctx->user[idata->u_id].mode = idata->udata.u.NotifyMode.Mode;
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/* Setup mmap pool for uaddr sgl mapping..*/
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rc = crystalhd_create_dio_pool(ctx->adp, BC_LINK_MAX_SGLS);
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if (rc)
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return BC_STS_ERROR;
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/* Setup Hardware DMA rings */
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return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx);
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}
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static enum BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return BC_STS_INV_ARG;
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}
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idata->udata.u.VerInfo.DriverMajor = crystalhd_kmod_major;
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idata->udata.u.VerInfo.DriverMinor = crystalhd_kmod_minor;
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idata->udata.u.VerInfo.DriverRevision = crystalhd_kmod_rev;
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return BC_STS_INV_ARG;
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}
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crystalhd_pci_cfg_rd(ctx->adp, 0, 2,
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(uint32_t *)&idata->udata.u.hwType.PciVenId);
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crystalhd_pci_cfg_rd(ctx->adp, 2, 2,
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(uint32_t *)&idata->udata.u.hwType.PciDevId);
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crystalhd_pci_cfg_rd(ctx->adp, 8, 1,
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(uint32_t *)&idata->udata.u.hwType.HwRev);
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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idata->udata.u.regAcc.Value = bc_dec_reg_rd(ctx->adp,
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idata->udata.u.regAcc.Offset);
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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bc_dec_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset,
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idata->udata.u.regAcc.Value);
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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idata->udata.u.regAcc.Value = crystalhd_reg_rd(ctx->adp,
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idata->udata.u.regAcc.Offset);
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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crystalhd_reg_wr(ctx->adp, idata->udata.u.regAcc.Offset,
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idata->udata.u.regAcc.Value);
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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enum BC_STATUS sts = BC_STS_SUCCESS;
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if (!ctx || !idata || !idata->add_cdata)
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return BC_STS_INV_ARG;
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if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) {
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BCMLOG_ERR("insufficient buffer\n");
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return BC_STS_INV_ARG;
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}
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sts = crystalhd_mem_rd(ctx->adp, idata->udata.u.devMem.StartOff,
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idata->udata.u.devMem.NumDwords,
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(uint32_t *)idata->add_cdata);
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return sts;
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}
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static enum BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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enum BC_STATUS sts = BC_STS_SUCCESS;
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if (!ctx || !idata || !idata->add_cdata)
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return BC_STS_INV_ARG;
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if (idata->udata.u.devMem.NumDwords > (idata->add_cdata_sz / 4)) {
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BCMLOG_ERR("insufficient buffer\n");
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return BC_STS_INV_ARG;
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}
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sts = crystalhd_mem_wr(ctx->adp, idata->udata.u.devMem.StartOff,
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idata->udata.u.devMem.NumDwords,
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(uint32_t *)idata->add_cdata);
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return sts;
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}
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static enum BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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uint32_t ix, cnt, off, len;
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enum BC_STATUS sts = BC_STS_SUCCESS;
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uint32_t *temp;
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space;
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off = idata->udata.u.pciCfg.Offset;
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len = idata->udata.u.pciCfg.Size;
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if (len <= 4)
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return crystalhd_pci_cfg_rd(ctx->adp, off, len, temp);
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/* Truncate to dword alignment..*/
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len = 4;
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cnt = idata->udata.u.pciCfg.Size / len;
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for (ix = 0; ix < cnt; ix++) {
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sts = crystalhd_pci_cfg_rd(ctx->adp, off, len, &temp[ix]);
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if (sts != BC_STS_SUCCESS) {
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BCMLOG_ERR("config read : %d\n", sts);
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return sts;
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}
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off += len;
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}
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return sts;
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}
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static enum BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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uint32_t ix, cnt, off, len;
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enum BC_STATUS sts = BC_STS_SUCCESS;
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uint32_t *temp;
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if (!ctx || !idata)
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return BC_STS_INV_ARG;
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temp = (uint32_t *) idata->udata.u.pciCfg.pci_cfg_space;
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off = idata->udata.u.pciCfg.Offset;
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len = idata->udata.u.pciCfg.Size;
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if (len <= 4)
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return crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[0]);
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/* Truncate to dword alignment..*/
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len = 4;
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cnt = idata->udata.u.pciCfg.Size / len;
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for (ix = 0; ix < cnt; ix++) {
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sts = crystalhd_pci_cfg_wr(ctx->adp, off, len, temp[ix]);
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if (sts != BC_STS_SUCCESS) {
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BCMLOG_ERR("config write : %d\n", sts);
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return sts;
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}
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off += len;
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}
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return sts;
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}
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static enum BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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enum BC_STATUS sts = BC_STS_SUCCESS;
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if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return BC_STS_INV_ARG;
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}
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if (ctx->state != BC_LINK_INVALID) {
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BCMLOG_ERR("Link invalid state %d\n", ctx->state);
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return BC_STS_ERR_USAGE;
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}
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sts = crystalhd_download_fw(ctx->adp, (uint8_t *)idata->add_cdata,
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idata->add_cdata_sz);
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if (sts != BC_STS_SUCCESS) {
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BCMLOG_ERR("Firmware Download Failure!! - %d\n", sts);
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} else
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ctx->state |= BC_LINK_INIT;
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return sts;
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}
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/*
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* We use the FW_CMD interface to sync up playback state with application
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* and firmware. This function will perform the required pre and post
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* processing of the Firmware commands.
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*
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* Pause -
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* Disable capture after decoder pause.
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* Resume -
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* First enable capture and issue decoder resume command.
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* Flush -
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* Abort pending input transfers and issue decoder flush command.
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*
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*/
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static enum BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata)
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{
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enum BC_STATUS sts;
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uint32_t *cmd;
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if (!(ctx->state & BC_LINK_INIT)) {
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BCMLOG_ERR("Link invalid state %d\n", ctx->state);
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return BC_STS_ERR_USAGE;
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}
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cmd = idata->udata.u.fwCmd.cmd;
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/* Pre-Process */
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if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) {
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if (!cmd[3]) {
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ctx->state &= ~BC_LINK_PAUSED;
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crystalhd_hw_unpause(&ctx->hw_ctx);
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}
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} else if (cmd[0] == eCMD_C011_DEC_CHAN_FLUSH) {
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BCMLOG(BCMLOG_INFO, "Flush issued\n");
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if (cmd[3])
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ctx->cin_wait_exit = 1;
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}
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sts = crystalhd_do_fw_cmd(&ctx->hw_ctx, &idata->udata.u.fwCmd);
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if (sts != BC_STS_SUCCESS) {
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BCMLOG(BCMLOG_INFO, "fw cmd %x failed\n", cmd[0]);
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return sts;
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}
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/* Post-Process */
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if (cmd[0] == eCMD_C011_DEC_CHAN_PAUSE) {
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if (cmd[3]) {
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ctx->state |= BC_LINK_PAUSED;
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crystalhd_hw_pause(&ctx->hw_ctx);
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}
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}
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return sts;
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}
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static void bc_proc_in_completion(struct crystalhd_dio_req *dio_hnd,
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wait_queue_head_t *event, enum BC_STATUS sts)
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{
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if (!dio_hnd || !event) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return;
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}
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if (sts == BC_STS_IO_USER_ABORT)
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return;
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dio_hnd->uinfo.comp_sts = sts;
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dio_hnd->uinfo.ev_sts = 1;
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crystalhd_set_event(event);
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}
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static enum BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx)
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{
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wait_queue_head_t sleep_ev;
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int rc = 0;
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if (ctx->state & BC_LINK_SUSPEND)
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return BC_STS_IO_USER_ABORT;
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if (ctx->cin_wait_exit) {
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ctx->cin_wait_exit = 0;
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return BC_STS_CMD_CANCELLED;
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}
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crystalhd_create_event(&sleep_ev);
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crystalhd_wait_on_event(&sleep_ev, 0, 100, rc, 0);
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if (rc == -EINTR)
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return BC_STS_IO_USER_ABORT;
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return BC_STS_SUCCESS;
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}
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static enum BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx,
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struct crystalhd_ioctl_data *idata,
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struct crystalhd_dio_req *dio)
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{
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uint32_t tx_listid = 0;
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enum BC_STATUS sts = BC_STS_SUCCESS;
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wait_queue_head_t event;
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int rc = 0;
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if (!ctx || !idata || !dio) {
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BCMLOG_ERR("Invalid Arg!!\n");
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return BC_STS_INV_ARG;
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}
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crystalhd_create_event(&event);
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ctx->tx_list_id = 0;
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/* msleep_interruptible(2000); */
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sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio, bc_proc_in_completion,
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&event, &tx_listid,
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idata->udata.u.ProcInput.Encrypted);
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while (sts == BC_STS_BUSY) {
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sts = bc_cproc_codein_sleep(ctx);
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if (sts != BC_STS_SUCCESS)
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break;
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sts = crystalhd_hw_post_tx(&ctx->hw_ctx, dio,
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bc_proc_in_completion,
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&event, &tx_listid,
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idata->udata.u.ProcInput.Encrypted);
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}
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if (sts != BC_STS_SUCCESS) {
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BCMLOG(BCMLOG_DBG, "_hw_txdma returning sts:%d\n", sts);
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return sts;
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}
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if (ctx->cin_wait_exit)
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ctx->cin_wait_exit = 0;
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ctx->tx_list_id = tx_listid;
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/* _post() succeeded.. wait for the completion. */
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crystalhd_wait_on_event(&event, (dio->uinfo.ev_sts), 3000, rc, 0);
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ctx->tx_list_id = 0;
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if (!rc) {
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return dio->uinfo.comp_sts;
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} else if (rc == -EBUSY) {
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BCMLOG(BCMLOG_DBG, "_tx_post() T/O\n");
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sts = BC_STS_TIMEOUT;
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} else if (rc == -EINTR) {
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BCMLOG(BCMLOG_DBG, "Tx Wait Signal int.\n");
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sts = BC_STS_IO_USER_ABORT;
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} else {
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sts = BC_STS_IO_ERROR;
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}
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/* We are cancelling the IO from the same context as the _post().
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* so no need to wait on the event again.. the return itself
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* ensures the release of our resources.
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*/
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crystalhd_hw_cancel_tx(&ctx->hw_ctx, tx_listid);
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return sts;
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}
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|
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/* Helper function to check on user buffers */
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static enum BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz,
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uint32_t uv_off, bool en_422)
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{
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if (!ubuff || !ub_sz) {
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BCMLOG_ERR("%s->Invalid Arg %p %x\n",
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((pin) ? "TX" : "RX"), ubuff, ub_sz);
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return BC_STS_INV_ARG;
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}
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|
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/* Check for alignment */
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if (((uintptr_t)ubuff) & 0x03) {
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BCMLOG_ERR("%s-->Un-aligned address not implemented yet.. %p\n",
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((pin) ? "TX" : "RX"), ubuff);
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return BC_STS_NOT_IMPL;
|
|
}
|
|
if (pin)
|
|
return BC_STS_SUCCESS;
|
|
|
|
if (!en_422 && !uv_off) {
|
|
BCMLOG_ERR("Need UV offset for 420 mode.\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
if (en_422 && uv_off) {
|
|
BCMLOG_ERR("UV offset in 422 mode ??\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
void *ubuff;
|
|
uint32_t ub_sz;
|
|
struct crystalhd_dio_req *dio_hnd = NULL;
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
ubuff = idata->udata.u.ProcInput.pDmaBuff;
|
|
ub_sz = idata->udata.u.ProcInput.BuffSz;
|
|
|
|
sts = bc_cproc_check_inbuffs(1, ubuff, ub_sz, 0, 0);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
|
|
sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, 0, 0, 1, &dio_hnd);
|
|
if (sts != BC_STS_SUCCESS) {
|
|
BCMLOG_ERR("dio map - %d\n", sts);
|
|
return sts;
|
|
}
|
|
|
|
if (!dio_hnd)
|
|
return BC_STS_ERROR;
|
|
|
|
sts = bc_cproc_hw_txdma(ctx, idata, dio_hnd);
|
|
|
|
crystalhd_unmap_dio(ctx->adp, dio_hnd);
|
|
|
|
return sts;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
void *ubuff;
|
|
uint32_t ub_sz, uv_off;
|
|
bool en_422;
|
|
struct crystalhd_dio_req *dio_hnd = NULL;
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
ubuff = idata->udata.u.RxBuffs.YuvBuff;
|
|
ub_sz = idata->udata.u.RxBuffs.YuvBuffSz;
|
|
uv_off = idata->udata.u.RxBuffs.UVbuffOffset;
|
|
en_422 = idata->udata.u.RxBuffs.b422Mode;
|
|
|
|
sts = bc_cproc_check_inbuffs(0, ubuff, ub_sz, uv_off, en_422);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
|
|
sts = crystalhd_map_dio(ctx->adp, ubuff, ub_sz, uv_off,
|
|
en_422, 0, &dio_hnd);
|
|
if (sts != BC_STS_SUCCESS) {
|
|
BCMLOG_ERR("dio map - %d\n", sts);
|
|
return sts;
|
|
}
|
|
|
|
if (!dio_hnd)
|
|
return BC_STS_ERROR;
|
|
|
|
sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio_hnd, (ctx->state == BC_LINK_READY));
|
|
if ((sts != BC_STS_SUCCESS) && (sts != BC_STS_BUSY)) {
|
|
crystalhd_unmap_dio(ctx->adp, dio_hnd);
|
|
return sts;
|
|
}
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_dio_req *dio)
|
|
{
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
|
|
sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
|
|
ctx->state |= BC_LINK_FMT_CHG;
|
|
if (ctx->state == BC_LINK_READY)
|
|
sts = crystalhd_hw_start_capture(&ctx->hw_ctx);
|
|
|
|
return sts;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
struct crystalhd_dio_req *dio = NULL;
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
struct BC_DEC_OUT_BUFF *frame;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
if (!(ctx->state & BC_LINK_CAP_EN)) {
|
|
BCMLOG(BCMLOG_DBG, "Capture not enabled..%x\n", ctx->state);
|
|
return BC_STS_ERR_USAGE;
|
|
}
|
|
|
|
frame = &idata->udata.u.DecOutData;
|
|
|
|
sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx, &frame->PibInfo, &dio);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return (ctx->state & BC_LINK_SUSPEND) ? BC_STS_IO_USER_ABORT : sts;
|
|
|
|
frame->Flags = dio->uinfo.comp_flags;
|
|
|
|
if (frame->Flags & COMP_FLAG_FMT_CHANGE)
|
|
return bc_cproc_fmt_change(ctx, dio);
|
|
|
|
frame->OutPutBuffs.YuvBuff = dio->uinfo.xfr_buff;
|
|
frame->OutPutBuffs.YuvBuffSz = dio->uinfo.xfr_len;
|
|
frame->OutPutBuffs.UVbuffOffset = dio->uinfo.uv_offset;
|
|
frame->OutPutBuffs.b422Mode = dio->uinfo.b422mode;
|
|
|
|
frame->OutPutBuffs.YBuffDoneSz = dio->uinfo.y_done_sz;
|
|
frame->OutPutBuffs.UVBuffDoneSz = dio->uinfo.uv_done_sz;
|
|
|
|
crystalhd_unmap_dio(ctx->adp, dio);
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
ctx->state |= BC_LINK_CAP_EN;
|
|
if (ctx->state == BC_LINK_READY)
|
|
return crystalhd_hw_start_capture(&ctx->hw_ctx);
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
struct crystalhd_dio_req *dio = NULL;
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
struct BC_DEC_OUT_BUFF *frame;
|
|
uint32_t count;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
if (!(ctx->state & BC_LINK_CAP_EN))
|
|
return BC_STS_ERR_USAGE;
|
|
|
|
/* We should ack flush even when we are in paused/suspend state */
|
|
if (!(ctx->state & BC_LINK_READY))
|
|
return crystalhd_hw_stop_capture(&ctx->hw_ctx);
|
|
|
|
ctx->state &= ~(BC_LINK_CAP_EN|BC_LINK_FMT_CHG);
|
|
|
|
frame = &idata->udata.u.DecOutData;
|
|
for (count = 0; count < BC_RX_LIST_CNT; count++) {
|
|
|
|
sts = crystalhd_hw_get_cap_buffer(&ctx->hw_ctx, &frame->PibInfo, &dio);
|
|
if (sts != BC_STS_SUCCESS)
|
|
break;
|
|
|
|
crystalhd_unmap_dio(ctx->adp, dio);
|
|
}
|
|
|
|
return crystalhd_hw_stop_capture(&ctx->hw_ctx);
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
struct BC_DTS_STATS *stats;
|
|
struct crystalhd_hw_stats hw_stats;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
crystalhd_hw_stats(&ctx->hw_ctx, &hw_stats);
|
|
|
|
stats = &idata->udata.u.drvStat;
|
|
stats->drvRLL = hw_stats.rdyq_count;
|
|
stats->drvFLL = hw_stats.freeq_count;
|
|
stats->DrvTotalFrmDropped = hw_stats.rx_errors;
|
|
stats->DrvTotalHWErrs = hw_stats.rx_errors + hw_stats.tx_errors;
|
|
stats->intCount = hw_stats.num_interrupts;
|
|
stats->DrvIgnIntrCnt = hw_stats.num_interrupts -
|
|
hw_stats.dev_interrupts;
|
|
stats->TxFifoBsyCnt = hw_stats.cin_busy;
|
|
stats->pauseCount = hw_stats.pause_cnt;
|
|
|
|
if (ctx->pwr_state_change)
|
|
stats->pwr_state_change = 1;
|
|
if (ctx->state & BC_LINK_PAUSED)
|
|
stats->DrvPauseTime = 1;
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
crystalhd_hw_stats(&ctx->hw_ctx, NULL);
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
static enum BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
struct BC_CLOCK *clock;
|
|
uint32_t oldClk;
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
clock = &idata->udata.u.clockValue;
|
|
oldClk = ctx->hw_ctx.core_clock_mhz;
|
|
ctx->hw_ctx.core_clock_mhz = clock->clk;
|
|
|
|
if (ctx->state & BC_LINK_READY) {
|
|
sts = crystalhd_hw_set_core_clock(&ctx->hw_ctx);
|
|
if (sts == BC_STS_CLK_NOCHG)
|
|
ctx->hw_ctx.core_clock_mhz = oldClk;
|
|
}
|
|
|
|
clock->clk = ctx->hw_ctx.core_clock_mhz;
|
|
|
|
return sts;
|
|
}
|
|
|
|
/*=============== Cmd Proc Table.. ======================================*/
|
|
static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = {
|
|
{ BCM_IOC_GET_VERSION, bc_cproc_get_version, 0},
|
|
{ BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0},
|
|
{ BCM_IOC_REG_RD, bc_cproc_reg_rd, 0},
|
|
{ BCM_IOC_REG_WR, bc_cproc_reg_wr, 0},
|
|
{ BCM_IOC_FPGA_RD, bc_cproc_link_reg_rd, 0},
|
|
{ BCM_IOC_FPGA_WR, bc_cproc_link_reg_wr, 0},
|
|
{ BCM_IOC_MEM_RD, bc_cproc_mem_rd, 0},
|
|
{ BCM_IOC_MEM_WR, bc_cproc_mem_wr, 0},
|
|
{ BCM_IOC_RD_PCI_CFG, bc_cproc_cfg_rd, 0},
|
|
{ BCM_IOC_WR_PCI_CFG, bc_cproc_cfg_wr, 1},
|
|
{ BCM_IOC_FW_DOWNLOAD, bc_cproc_download_fw, 1},
|
|
{ BCM_IOC_FW_CMD, bc_cproc_do_fw_cmd, 1},
|
|
{ BCM_IOC_PROC_INPUT, bc_cproc_proc_input, 1},
|
|
{ BCM_IOC_ADD_RXBUFFS, bc_cproc_add_cap_buff, 1},
|
|
{ BCM_IOC_FETCH_RXBUFF, bc_cproc_fetch_frame, 1},
|
|
{ BCM_IOC_START_RX_CAP, bc_cproc_start_capture, 1},
|
|
{ BCM_IOC_FLUSH_RX_CAP, bc_cproc_flush_cap_buffs, 1},
|
|
{ BCM_IOC_GET_DRV_STAT, bc_cproc_get_stats, 0},
|
|
{ BCM_IOC_RST_DRV_STAT, bc_cproc_reset_stats, 0},
|
|
{ BCM_IOC_NOTIFY_MODE, bc_cproc_notify_mode, 0},
|
|
{ BCM_IOC_CHG_CLK, bc_cproc_chg_clk, 0},
|
|
{ BCM_IOC_END, NULL},
|
|
};
|
|
|
|
/*=============== Cmd Proc Functions.. ===================================*/
|
|
|
|
/**
|
|
* crystalhd_suspend - Power management suspend request.
|
|
* @ctx: Command layer context.
|
|
* @idata: Iodata - required for internal use.
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
* 1. Set the state to Suspend.
|
|
* 2. Flush the Rx Buffers it will unmap all the buffers and
|
|
* stop the RxDMA engine.
|
|
* 3. Cancel The TX Io and Stop Dma Engine.
|
|
* 4. Put the DDR in to deep sleep.
|
|
* 5. Stop the hardware putting it in to Reset State.
|
|
*
|
|
* Current gstreamer frame work does not provide any power management
|
|
* related notification to user mode decoder plug-in. As a work-around
|
|
* we pass on the power mangement notification to our plug-in by completing
|
|
* all outstanding requests with BC_STS_IO_USER_ABORT return code.
|
|
*/
|
|
enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_ioctl_data *idata)
|
|
{
|
|
enum BC_STATUS sts = BC_STS_SUCCESS;
|
|
|
|
if (!ctx || !idata) {
|
|
BCMLOG_ERR("Invalid Parameters\n");
|
|
return BC_STS_ERROR;
|
|
}
|
|
|
|
if (ctx->state & BC_LINK_SUSPEND)
|
|
return BC_STS_SUCCESS;
|
|
|
|
if (ctx->state == BC_LINK_INVALID) {
|
|
BCMLOG(BCMLOG_DBG, "Nothing To Do Suspend Success\n");
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
ctx->state |= BC_LINK_SUSPEND;
|
|
|
|
bc_cproc_mark_pwr_state(ctx);
|
|
|
|
if (ctx->state & BC_LINK_CAP_EN) {
|
|
sts = bc_cproc_flush_cap_buffs(ctx, idata);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
}
|
|
|
|
if (ctx->tx_list_id) {
|
|
sts = crystalhd_hw_cancel_tx(&ctx->hw_ctx, ctx->tx_list_id);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
}
|
|
|
|
sts = crystalhd_hw_suspend(&ctx->hw_ctx);
|
|
if (sts != BC_STS_SUCCESS)
|
|
return sts;
|
|
|
|
BCMLOG(BCMLOG_DBG, "BCM70012 suspend success\n");
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_resume - Resume frame capture.
|
|
* @ctx: Command layer contextx.
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
*
|
|
* Resume frame capture.
|
|
*
|
|
* PM_Resume can't resume the playback state back to pre-suspend state
|
|
* because we don't keep video clip related information within driver.
|
|
* To get back to the pre-suspend state App will re-open the device and
|
|
* start a new playback session from the pre-suspend clip position.
|
|
*
|
|
*/
|
|
enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx)
|
|
{
|
|
BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state);
|
|
|
|
bc_cproc_mark_pwr_state(ctx);
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_user_open - Create application handle.
|
|
* @ctx: Command layer contextx.
|
|
* @user_ctx: User ID context.
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
* Creates an application specific UID and allocates
|
|
* application specific resources. HW layer initialization
|
|
* is done for the first open request.
|
|
*/
|
|
enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_user **user_ctx)
|
|
{
|
|
struct crystalhd_user *uc;
|
|
|
|
if (!ctx || !user_ctx) {
|
|
BCMLOG_ERR("Invalid arg..\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
uc = bc_cproc_get_uid(ctx);
|
|
if (!uc) {
|
|
BCMLOG(BCMLOG_INFO, "No free user context...\n");
|
|
return BC_STS_BUSY;
|
|
}
|
|
|
|
BCMLOG(BCMLOG_INFO, "Opening new user[%x] handle\n", uc->uid);
|
|
|
|
crystalhd_hw_open(&ctx->hw_ctx, ctx->adp);
|
|
|
|
uc->in_use = 1;
|
|
|
|
*user_ctx = uc;
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_user_close - Close application handle.
|
|
* @ctx: Command layer contextx.
|
|
* @uc: User ID context.
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
* Closer aplication handle and release app specific
|
|
* resources.
|
|
*/
|
|
enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc)
|
|
{
|
|
uint32_t mode = uc->mode;
|
|
|
|
ctx->user[uc->uid].mode = DTS_MODE_INV;
|
|
ctx->user[uc->uid].in_use = 0;
|
|
ctx->cin_wait_exit = 1;
|
|
ctx->pwr_state_change = 0;
|
|
|
|
BCMLOG(BCMLOG_INFO, "Closing user[%x] handle\n", uc->uid);
|
|
|
|
if ((mode == DTS_DIAG_MODE) || (mode == DTS_PLAYBACK_MODE)) {
|
|
crystalhd_hw_free_dma_rings(&ctx->hw_ctx);
|
|
crystalhd_destroy_dio_pool(ctx->adp);
|
|
} else if (bc_cproc_get_user_count(ctx)) {
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
crystalhd_hw_close(&ctx->hw_ctx);
|
|
|
|
ctx->state = BC_LINK_INVALID;
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_setup_cmd_context - Setup Command layer resources.
|
|
* @ctx: Command layer contextx.
|
|
* @adp: Adapter context
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
* Called at the time of driver load.
|
|
*/
|
|
enum BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx,
|
|
struct crystalhd_adp *adp)
|
|
{
|
|
int i = 0;
|
|
|
|
if (!ctx || !adp) {
|
|
BCMLOG_ERR("Invalid arg!!\n");
|
|
return BC_STS_INV_ARG;
|
|
}
|
|
|
|
if (ctx->adp)
|
|
BCMLOG(BCMLOG_DBG, "Resetting Cmd context delete missing..\n");
|
|
|
|
ctx->adp = adp;
|
|
for (i = 0; i < BC_LINK_MAX_OPENS; i++) {
|
|
ctx->user[i].uid = i;
|
|
ctx->user[i].in_use = 0;
|
|
ctx->user[i].mode = DTS_MODE_INV;
|
|
}
|
|
|
|
/*Open and Close the Hardware to put it in to sleep state*/
|
|
crystalhd_hw_open(&ctx->hw_ctx, ctx->adp);
|
|
crystalhd_hw_close(&ctx->hw_ctx);
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_delete_cmd_context - Release Command layer resources.
|
|
* @ctx: Command layer contextx.
|
|
*
|
|
* Return:
|
|
* status
|
|
*
|
|
* Called at the time of driver un-load.
|
|
*/
|
|
enum BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx)
|
|
{
|
|
BCMLOG(BCMLOG_DBG, "Deleting Command context..\n");
|
|
|
|
ctx->adp = NULL;
|
|
|
|
return BC_STS_SUCCESS;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_get_cmd_proc - Cproc table lookup.
|
|
* @ctx: Command layer contextx.
|
|
* @cmd: IOCTL command code.
|
|
* @uc: User ID context.
|
|
*
|
|
* Return:
|
|
* command proc function pointer
|
|
*
|
|
* This function checks the process context, application's
|
|
* mode of operation and returns the function pointer
|
|
* from the cproc table.
|
|
*/
|
|
crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd,
|
|
struct crystalhd_user *uc)
|
|
{
|
|
crystalhd_cmd_proc cproc = NULL;
|
|
unsigned int i, tbl_sz;
|
|
|
|
if (!ctx) {
|
|
BCMLOG_ERR("Invalid arg.. Cmd[%d]\n", cmd);
|
|
return NULL;
|
|
}
|
|
|
|
if ((cmd != BCM_IOC_GET_DRV_STAT) && (ctx->state & BC_LINK_SUSPEND)) {
|
|
BCMLOG_ERR("Invalid State [suspend Set].. Cmd[%d]\n", cmd);
|
|
return NULL;
|
|
}
|
|
|
|
tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(struct crystalhd_cmd_tbl);
|
|
for (i = 0; i < tbl_sz; i++) {
|
|
if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) {
|
|
if ((uc->mode == DTS_MONITOR_MODE) &&
|
|
(g_crystalhd_cproc_tbl[i].block_mon)) {
|
|
BCMLOG(BCMLOG_INFO, "Blocking cmd %d\n", cmd);
|
|
break;
|
|
}
|
|
cproc = g_crystalhd_cproc_tbl[i].cmd_proc;
|
|
break;
|
|
}
|
|
}
|
|
|
|
return cproc;
|
|
}
|
|
|
|
/**
|
|
* crystalhd_cmd_interrupt - ISR entry point
|
|
* @ctx: Command layer contextx.
|
|
*
|
|
* Return:
|
|
* TRUE: If interrupt from bcm70012 device.
|
|
*
|
|
*
|
|
* ISR entry point from OS layer.
|
|
*/
|
|
bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx)
|
|
{
|
|
if (!ctx) {
|
|
BCMLOG_ERR("Invalid arg..\n");
|
|
return 0;
|
|
}
|
|
|
|
return crystalhd_hw_interrupt(ctx->adp, &ctx->hw_ctx);
|
|
}
|