![Heiko Carstens](/assets/img/avatar_default.png)
Provide a topology_core_id define which makes sure that the contents of /sys/devices/system/cpu/cpuX/topology/core_id indeed do contain the core id and not always 0. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
340 lines
6.7 KiB
C
340 lines
6.7 KiB
C
/*
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* Copyright IBM Corp. 2007
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* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
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*/
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#define KMSG_COMPONENT "cpu"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/bootmem.h>
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#include <linux/sched.h>
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#include <linux/workqueue.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/cpuset.h>
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#include <asm/delay.h>
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#include <asm/s390_ext.h>
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#include <asm/sysinfo.h>
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#define CPU_BITS 64
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#define NR_MAG 6
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#define PTF_HORIZONTAL (0UL)
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#define PTF_VERTICAL (1UL)
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#define PTF_CHECK (2UL)
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struct tl_cpu {
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unsigned char reserved0[4];
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unsigned char :6;
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unsigned char pp:2;
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unsigned char reserved1;
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unsigned short origin;
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unsigned long mask[CPU_BITS / BITS_PER_LONG];
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};
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struct tl_container {
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unsigned char reserved[7];
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unsigned char id;
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};
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union tl_entry {
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unsigned char nl;
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struct tl_cpu cpu;
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struct tl_container container;
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};
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struct tl_info {
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unsigned char reserved0[2];
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unsigned short length;
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unsigned char mag[NR_MAG];
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unsigned char reserved1;
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unsigned char mnest;
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unsigned char reserved2[4];
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union tl_entry tle[0];
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};
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struct core_info {
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struct core_info *next;
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unsigned char id;
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cpumask_t mask;
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};
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static int topology_enabled;
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static void topology_work_fn(struct work_struct *work);
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static struct tl_info *tl_info;
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static struct core_info core_info;
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static int machine_has_topology;
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static struct timer_list topology_timer;
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static void set_topology_timer(void);
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static DECLARE_WORK(topology_work, topology_work_fn);
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/* topology_lock protects the core linked list */
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static DEFINE_SPINLOCK(topology_lock);
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cpumask_t cpu_core_map[NR_CPUS];
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unsigned char cpu_core_id[NR_CPUS];
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static cpumask_t cpu_coregroup_map(unsigned int cpu)
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{
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struct core_info *core = &core_info;
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unsigned long flags;
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cpumask_t mask;
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cpus_clear(mask);
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if (!topology_enabled || !machine_has_topology)
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return cpu_possible_map;
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spin_lock_irqsave(&topology_lock, flags);
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while (core) {
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if (cpu_isset(cpu, core->mask)) {
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mask = core->mask;
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break;
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}
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core = core->next;
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}
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spin_unlock_irqrestore(&topology_lock, flags);
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if (cpus_empty(mask))
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mask = cpumask_of_cpu(cpu);
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return mask;
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}
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const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
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{
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return &cpu_core_map[cpu];
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}
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static void add_cpus_to_core(struct tl_cpu *tl_cpu, struct core_info *core)
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{
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unsigned int cpu;
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for (cpu = find_first_bit(&tl_cpu->mask[0], CPU_BITS);
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cpu < CPU_BITS;
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cpu = find_next_bit(&tl_cpu->mask[0], CPU_BITS, cpu + 1))
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{
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unsigned int rcpu, lcpu;
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rcpu = CPU_BITS - 1 - cpu + tl_cpu->origin;
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for_each_present_cpu(lcpu) {
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if (cpu_logical_map(lcpu) == rcpu) {
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cpu_set(lcpu, core->mask);
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cpu_core_id[lcpu] = core->id;
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smp_cpu_polarization[lcpu] = tl_cpu->pp;
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}
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}
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}
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}
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static void clear_cores(void)
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{
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struct core_info *core = &core_info;
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while (core) {
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cpus_clear(core->mask);
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core = core->next;
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}
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}
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static union tl_entry *next_tle(union tl_entry *tle)
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{
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if (tle->nl)
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return (union tl_entry *)((struct tl_container *)tle + 1);
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else
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return (union tl_entry *)((struct tl_cpu *)tle + 1);
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}
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static void tl_to_cores(struct tl_info *info)
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{
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union tl_entry *tle, *end;
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struct core_info *core = &core_info;
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spin_lock_irq(&topology_lock);
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clear_cores();
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tle = info->tle;
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end = (union tl_entry *)((unsigned long)info + info->length);
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while (tle < end) {
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switch (tle->nl) {
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case 5:
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case 4:
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case 3:
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case 2:
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break;
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case 1:
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core = core->next;
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core->id = tle->container.id;
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break;
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case 0:
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add_cpus_to_core(&tle->cpu, core);
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break;
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default:
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clear_cores();
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machine_has_topology = 0;
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goto out;
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}
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tle = next_tle(tle);
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}
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out:
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spin_unlock_irq(&topology_lock);
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}
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static void topology_update_polarization_simple(void)
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{
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int cpu;
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mutex_lock(&smp_cpu_state_mutex);
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for_each_possible_cpu(cpu)
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smp_cpu_polarization[cpu] = POLARIZATION_HRZ;
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mutex_unlock(&smp_cpu_state_mutex);
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}
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static int ptf(unsigned long fc)
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{
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int rc;
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asm volatile(
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" .insn rre,0xb9a20000,%1,%1\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (rc)
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: "d" (fc) : "cc");
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return rc;
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}
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int topology_set_cpu_management(int fc)
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{
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int cpu;
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int rc;
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if (!machine_has_topology)
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return -EOPNOTSUPP;
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if (fc)
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rc = ptf(PTF_VERTICAL);
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else
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rc = ptf(PTF_HORIZONTAL);
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if (rc)
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return -EBUSY;
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for_each_possible_cpu(cpu)
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smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
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return rc;
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}
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static void update_cpu_core_map(void)
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{
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int cpu;
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for_each_possible_cpu(cpu)
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cpu_core_map[cpu] = cpu_coregroup_map(cpu);
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}
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int arch_update_cpu_topology(void)
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{
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struct tl_info *info = tl_info;
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struct sys_device *sysdev;
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int cpu;
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if (!machine_has_topology) {
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update_cpu_core_map();
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topology_update_polarization_simple();
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return 0;
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}
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stsi(info, 15, 1, 2);
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tl_to_cores(info);
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update_cpu_core_map();
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for_each_online_cpu(cpu) {
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sysdev = get_cpu_sysdev(cpu);
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kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
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}
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return 1;
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}
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static void topology_work_fn(struct work_struct *work)
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{
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rebuild_sched_domains();
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}
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void topology_schedule_update(void)
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{
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schedule_work(&topology_work);
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}
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static void topology_timer_fn(unsigned long ignored)
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{
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if (ptf(PTF_CHECK))
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topology_schedule_update();
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set_topology_timer();
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}
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static void set_topology_timer(void)
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{
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topology_timer.function = topology_timer_fn;
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topology_timer.data = 0;
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topology_timer.expires = jiffies + 60 * HZ;
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add_timer(&topology_timer);
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}
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static int __init early_parse_topology(char *p)
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{
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if (strncmp(p, "on", 2))
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return 0;
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topology_enabled = 1;
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return 0;
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}
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early_param("topology", early_parse_topology);
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static int __init init_topology_update(void)
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{
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int rc;
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rc = 0;
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if (!machine_has_topology) {
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topology_update_polarization_simple();
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goto out;
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}
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init_timer_deferrable(&topology_timer);
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set_topology_timer();
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out:
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update_cpu_core_map();
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return rc;
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}
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__initcall(init_topology_update);
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void __init s390_init_cpu_topology(void)
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{
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unsigned long long facility_bits;
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struct tl_info *info;
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struct core_info *core;
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int nr_cores;
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int i;
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if (stfle(&facility_bits, 1) <= 0)
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return;
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if (!(facility_bits & (1ULL << 52)) || !(facility_bits & (1ULL << 61)))
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return;
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machine_has_topology = 1;
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tl_info = alloc_bootmem_pages(PAGE_SIZE);
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info = tl_info;
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stsi(info, 15, 1, 2);
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nr_cores = info->mag[NR_MAG - 2];
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for (i = 0; i < info->mnest - 2; i++)
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nr_cores *= info->mag[NR_MAG - 3 - i];
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pr_info("The CPU configuration topology of the machine is:");
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for (i = 0; i < NR_MAG; i++)
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printk(" %d", info->mag[i]);
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printk(" / %d\n", info->mnest);
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core = &core_info;
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for (i = 0; i < nr_cores; i++) {
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core->next = alloc_bootmem(sizeof(struct core_info));
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core = core->next;
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if (!core)
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goto error;
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}
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return;
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error:
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machine_has_topology = 0;
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}
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