![Martin Schwidefsky](/assets/img/avatar_default.png)
Drop support to compile the kernel with gcc versions older than 3.3.3. This allows us to use the "Q" inline assembly contraint on some more inline assemblies without duplicating a lot of complex code (e.g. __xchg and __cmpxchg). The distinction for older gcc versions can be removed which saves a few lines and simplifies the code. Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
177 lines
4.5 KiB
C
177 lines
4.5 KiB
C
/*
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* include/asm-s390/spinlock.h
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*
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* S390 version
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* Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*
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* Derived from "include/asm-i386/spinlock.h"
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*/
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#ifndef __ASM_SPINLOCK_H
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#define __ASM_SPINLOCK_H
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#include <linux/smp.h>
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static inline int
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_raw_compare_and_swap(volatile unsigned int *lock,
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unsigned int old, unsigned int new)
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{
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asm volatile(
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" cs %0,%3,%1"
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: "=d" (old), "=Q" (*lock)
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: "0" (old), "d" (new), "Q" (*lock)
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: "cc", "memory" );
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return old;
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}
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/*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* We make no fairness assumptions. They have a cost.
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*
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* (the type definitions are in asm/spinlock_types.h)
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*/
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#define arch_spin_is_locked(x) ((x)->owner_cpu != 0)
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#define arch_spin_unlock_wait(lock) \
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do { while (arch_spin_is_locked(lock)) \
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arch_spin_relax(lock); } while (0)
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extern void arch_spin_lock_wait(arch_spinlock_t *);
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extern void arch_spin_lock_wait_flags(arch_spinlock_t *, unsigned long flags);
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extern int arch_spin_trylock_retry(arch_spinlock_t *);
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extern void arch_spin_relax(arch_spinlock_t *lock);
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static inline void arch_spin_lock(arch_spinlock_t *lp)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return;
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arch_spin_lock_wait(lp);
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}
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static inline void arch_spin_lock_flags(arch_spinlock_t *lp,
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unsigned long flags)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return;
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arch_spin_lock_wait_flags(lp, flags);
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}
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static inline int arch_spin_trylock(arch_spinlock_t *lp)
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{
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int old;
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old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
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if (likely(old == 0))
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return 1;
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return arch_spin_trylock_retry(lp);
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}
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static inline void arch_spin_unlock(arch_spinlock_t *lp)
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{
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_raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0);
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}
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/*
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* Read-write spinlocks, allowing multiple readers
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* but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts
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* but no interrupt writers. For those circumstances we
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* can "mix" irq-safe locks - any writer needs to get a
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* irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*/
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/**
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* read_can_lock - would read_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define arch_read_can_lock(x) ((int)(x)->lock >= 0)
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/**
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* write_can_lock - would write_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define arch_write_can_lock(x) ((x)->lock == 0)
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extern void _raw_read_lock_wait(arch_rwlock_t *lp);
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extern void _raw_read_lock_wait_flags(arch_rwlock_t *lp, unsigned long flags);
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extern int _raw_read_trylock_retry(arch_rwlock_t *lp);
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extern void _raw_write_lock_wait(arch_rwlock_t *lp);
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extern void _raw_write_lock_wait_flags(arch_rwlock_t *lp, unsigned long flags);
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extern int _raw_write_trylock_retry(arch_rwlock_t *lp);
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static inline void arch_read_lock(arch_rwlock_t *rw)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
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_raw_read_lock_wait(rw);
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}
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static inline void arch_read_lock_flags(arch_rwlock_t *rw, unsigned long flags)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
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_raw_read_lock_wait_flags(rw, flags);
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}
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static inline void arch_read_unlock(arch_rwlock_t *rw)
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{
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unsigned int old, cmp;
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old = rw->lock;
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do {
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cmp = old;
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old = _raw_compare_and_swap(&rw->lock, old, old - 1);
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} while (cmp != old);
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}
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static inline void arch_write_lock(arch_rwlock_t *rw)
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{
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if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
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_raw_write_lock_wait(rw);
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}
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static inline void arch_write_lock_flags(arch_rwlock_t *rw, unsigned long flags)
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{
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if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
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_raw_write_lock_wait_flags(rw, flags);
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}
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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{
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_raw_compare_and_swap(&rw->lock, 0x80000000, 0);
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}
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static inline int arch_read_trylock(arch_rwlock_t *rw)
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{
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unsigned int old;
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old = rw->lock & 0x7fffffffU;
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if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old))
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return 1;
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return _raw_read_trylock_retry(rw);
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}
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static inline int arch_write_trylock(arch_rwlock_t *rw)
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{
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if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0))
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return 1;
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return _raw_write_trylock_retry(rw);
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}
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#define arch_read_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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#endif /* __ASM_SPINLOCK_H */
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