430 lines
9.3 KiB
ArmAsm
430 lines
9.3 KiB
ArmAsm
.text
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/msr.h>
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#include <asm/asm-offsets.h>
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# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
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#
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# wakeup_code runs in real mode, and at unknown address (determined at run-time).
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# Therefore it must only use relative jumps/calls.
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#
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# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
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#
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# If physical address of wakeup_code is 0x12345, BIOS should call us with
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# cs = 0x1234, eip = 0x05
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#
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#define BEEP \
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inb $97, %al; \
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outb %al, $0x80; \
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movb $3, %al; \
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outb %al, $97; \
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outb %al, $0x80; \
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movb $-74, %al; \
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outb %al, $67; \
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outb %al, $0x80; \
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movb $-119, %al; \
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outb %al, $66; \
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outb %al, $0x80; \
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movb $15, %al; \
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outb %al, $66;
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ALIGN
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.align 16
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ENTRY(wakeup_start)
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wakeup_code:
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wakeup_code_start = .
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.code16
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# Running in *copy* of this code, somewhere in low 1MB.
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cli
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cld
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# setup data segment
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movw %cs, %ax
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movw %ax, %ds # Make ds:0 point to wakeup_start
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movw %ax, %ss
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# Data segment must be set up before we can see whether to beep.
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testl $4, realmode_flags - wakeup_code
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jz 1f
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BEEP
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1:
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# Private stack is needed for ASUS board
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mov $(wakeup_stack - wakeup_code), %sp
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pushl $0 # Kill any dangerous flags
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popfl
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movl real_magic - wakeup_code, %eax
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cmpl $0x12345678, %eax
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jne bogus_real_magic
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testl $1, realmode_flags - wakeup_code
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jz 1f
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lcall $0xc000,$3
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movw %cs, %ax
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movw %ax, %ds # Bios might have played with that
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movw %ax, %ss
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1:
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testl $2, realmode_flags - wakeup_code
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jz 1f
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mov video_mode - wakeup_code, %ax
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call mode_set
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1:
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mov %ds, %ax # Find 32bit wakeup_code addr
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movzx %ax, %esi # (Convert %ds:gdt to a liner ptr)
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shll $4, %esi
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# Fix up the vectors
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addl %esi, wakeup_32_vector - wakeup_code
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addl %esi, wakeup_long64_vector - wakeup_code
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addl %esi, gdt_48a + 2 - wakeup_code # Fixup the gdt pointer
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lidtl %ds:idt_48a - wakeup_code
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lgdtl %ds:gdt_48a - wakeup_code # load gdt with whatever is
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# appropriate
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movl $1, %eax # protected mode (PE) bit
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lmsw %ax # This is it!
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jmp 1f
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1:
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ljmpl *(wakeup_32_vector - wakeup_code)
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.balign 4
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wakeup_32_vector:
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.long wakeup_32 - wakeup_code
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.word __KERNEL32_CS, 0
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.code32
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wakeup_32:
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# Running in this code, but at low address; paging is not yet turned on.
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movl $__KERNEL_DS, %eax
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movl %eax, %ds
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/*
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* Prepare for entering 64bits mode
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*/
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/* Enable PAE */
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xorl %eax, %eax
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btsl $5, %eax
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movl %eax, %cr4
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/* Setup early boot stage 4 level pagetables */
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leal (wakeup_level4_pgt - wakeup_code)(%esi), %eax
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movl %eax, %cr3
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/* Check if nx is implemented */
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movl $0x80000001, %eax
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cpuid
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movl %edx,%edi
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/* Enable Long Mode */
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xorl %eax, %eax
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btsl $_EFER_LME, %eax
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/* No Execute supported? */
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btl $20,%edi
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jnc 1f
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btsl $_EFER_NX, %eax
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/* Make changes effective */
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1: movl $MSR_EFER, %ecx
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xorl %edx, %edx
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wrmsr
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xorl %eax, %eax
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btsl $31, %eax /* Enable paging and in turn activate Long Mode */
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btsl $0, %eax /* Enable protected mode */
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/* Make changes effective */
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movl %eax, %cr0
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/* At this point:
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CR4.PAE must be 1
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CS.L must be 0
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CR3 must point to PML4
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Next instruction must be a branch
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This must be on identity-mapped page
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*/
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/*
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* At this point we're in long mode but in 32bit compatibility mode
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* with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
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* EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
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* the new gdt/idt that has __KERNEL_CS with CS.L = 1.
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*/
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/* Finally jump in 64bit mode */
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ljmp *(wakeup_long64_vector - wakeup_code)(%esi)
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.balign 4
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wakeup_long64_vector:
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.long wakeup_long64 - wakeup_code
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.word __KERNEL_CS, 0
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.code64
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/* Hooray, we are in Long 64-bit mode (but still running in
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* low memory)
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*/
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wakeup_long64:
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/*
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* We must switch to a new descriptor in kernel space for the GDT
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* because soon the kernel won't have access anymore to the userspace
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* addresses where we're currently running on. We have to do that here
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* because in 32bit we couldn't load a 64bit linear address.
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*/
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lgdt cpu_gdt_descr
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movq saved_magic, %rax
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movq $0x123456789abcdef0, %rdx
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cmpq %rdx, %rax
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jne bogus_64_magic
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nop
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nop
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movw $__KERNEL_DS, %ax
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movw %ax, %ss
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movw %ax, %ds
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movw %ax, %es
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movw %ax, %fs
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movw %ax, %gs
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movq saved_rsp, %rsp
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movq saved_rbx, %rbx
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movq saved_rdi, %rdi
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movq saved_rsi, %rsi
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movq saved_rbp, %rbp
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movq saved_rip, %rax
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jmp *%rax
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.code32
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.align 64
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gdta:
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/* Its good to keep gdt in sync with one in trampoline.S */
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.word 0, 0, 0, 0 # dummy
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/* ??? Why I need the accessed bit set in order for this to work? */
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.quad 0x00cf9b000000ffff # __KERNEL32_CS
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.quad 0x00af9b000000ffff # __KERNEL_CS
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.quad 0x00cf93000000ffff # __KERNEL_DS
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idt_48a:
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.word 0 # idt limit = 0
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.word 0, 0 # idt base = 0L
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gdt_48a:
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.word 0x800 # gdt limit=2048,
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# 256 GDT entries
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.long gdta - wakeup_code # gdt base (relocated in later)
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real_magic: .quad 0
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video_mode: .quad 0
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realmode_flags: .quad 0
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.code16
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bogus_real_magic:
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jmp bogus_real_magic
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.code64
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bogus_64_magic:
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jmp bogus_64_magic
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/* This code uses an extended set of video mode numbers. These include:
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* Aliases for standard modes
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* NORMAL_VGA (-1)
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* EXTENDED_VGA (-2)
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* ASK_VGA (-3)
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* Video modes numbered by menu position -- NOT RECOMMENDED because of lack
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* of compatibility when extending the table. These are between 0x00 and 0xff.
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*/
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#define VIDEO_FIRST_MENU 0x0000
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/* Standard BIOS video modes (BIOS number + 0x0100) */
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#define VIDEO_FIRST_BIOS 0x0100
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/* VESA BIOS video modes (VESA number + 0x0200) */
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#define VIDEO_FIRST_VESA 0x0200
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/* Video7 special modes (BIOS number + 0x0900) */
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#define VIDEO_FIRST_V7 0x0900
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# Setting of user mode (AX=mode ID) => CF=success
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# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
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# modes, we should probably compile in the video code from the boot
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# directory.
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.code16
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mode_set:
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movw %ax, %bx
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subb $VIDEO_FIRST_VESA>>8, %bh
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cmpb $2, %bh
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jb check_vesa
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setbad:
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clc
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ret
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check_vesa:
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orw $0x4000, %bx # Use linear frame buffer
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movw $0x4f02, %ax # VESA BIOS mode set call
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int $0x10
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cmpw $0x004f, %ax # AL=4f if implemented
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jnz setbad # AH=0 if OK
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stc
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ret
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wakeup_stack_begin: # Stack grows down
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.org 0xff0
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wakeup_stack: # Just below end of page
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.org 0x1000
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ENTRY(wakeup_level4_pgt)
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.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
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.fill 510,8,0
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/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
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.quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
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ENTRY(wakeup_end)
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##
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# acpi_copy_wakeup_routine
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#
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# Copy the above routine to low memory.
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#
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# Parameters:
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# %rdi: place to copy wakeup routine to
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#
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# Returned address is location of code in low memory (past data and stack)
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#
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.code64
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ENTRY(acpi_copy_wakeup_routine)
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pushq %rax
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pushq %rdx
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movl saved_video_mode, %edx
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movl %edx, video_mode - wakeup_start (,%rdi)
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movl acpi_realmode_flags, %edx
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movl %edx, realmode_flags - wakeup_start (,%rdi)
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movq $0x12345678, real_magic - wakeup_start (,%rdi)
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movq $0x123456789abcdef0, %rdx
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movq %rdx, saved_magic
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movq saved_magic, %rax
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movq $0x123456789abcdef0, %rdx
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cmpq %rdx, %rax
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jne bogus_64_magic
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# restore the regs we used
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popq %rdx
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popq %rax
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ENTRY(do_suspend_lowlevel_s4bios)
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ret
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.align 2
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.p2align 4,,15
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.globl do_suspend_lowlevel
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.type do_suspend_lowlevel,@function
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do_suspend_lowlevel:
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.LFB5:
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subq $8, %rsp
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xorl %eax, %eax
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call save_processor_state
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movq $saved_context, %rax
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movq %rsp, pt_regs_sp(%rax)
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movq %rbp, pt_regs_bp(%rax)
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movq %rsi, pt_regs_si(%rax)
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movq %rdi, pt_regs_di(%rax)
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movq %rbx, pt_regs_bx(%rax)
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movq %rcx, pt_regs_cx(%rax)
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movq %rdx, pt_regs_dx(%rax)
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movq %r8, pt_regs_r8(%rax)
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movq %r9, pt_regs_r9(%rax)
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movq %r10, pt_regs_r10(%rax)
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movq %r11, pt_regs_r11(%rax)
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movq %r12, pt_regs_r12(%rax)
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movq %r13, pt_regs_r13(%rax)
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movq %r14, pt_regs_r14(%rax)
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movq %r15, pt_regs_r15(%rax)
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pushfq
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popq pt_regs_flags(%rax)
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movq $.L97, saved_rip(%rip)
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movq %rsp, saved_rsp
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movq %rbp, saved_rbp
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movq %rbx, saved_rbx
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movq %rdi, saved_rdi
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movq %rsi, saved_rsi
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addq $8, %rsp
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movl $3, %edi
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xorl %eax, %eax
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jmp acpi_enter_sleep_state
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.L97:
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.p2align 4,,7
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.L99:
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.align 4
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movl $24, %eax
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movw %ax, %ds
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/* We don't restore %rax, it must be 0 anyway */
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movq $saved_context, %rax
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movq saved_context_cr4(%rax), %rbx
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movq %rbx, %cr4
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movq saved_context_cr3(%rax), %rbx
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movq %rbx, %cr3
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movq saved_context_cr2(%rax), %rbx
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movq %rbx, %cr2
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movq saved_context_cr0(%rax), %rbx
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movq %rbx, %cr0
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pushq pt_regs_flags(%rax)
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popfq
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movq pt_regs_sp(%rax), %rsp
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movq pt_regs_bp(%rax), %rbp
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movq pt_regs_si(%rax), %rsi
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movq pt_regs_di(%rax), %rdi
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movq pt_regs_bx(%rax), %rbx
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movq pt_regs_cx(%rax), %rcx
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movq pt_regs_dx(%rax), %rdx
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movq pt_regs_r8(%rax), %r8
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movq pt_regs_r9(%rax), %r9
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movq pt_regs_r10(%rax), %r10
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movq pt_regs_r11(%rax), %r11
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movq pt_regs_r12(%rax), %r12
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movq pt_regs_r13(%rax), %r13
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movq pt_regs_r14(%rax), %r14
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movq pt_regs_r15(%rax), %r15
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xorl %eax, %eax
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addq $8, %rsp
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jmp restore_processor_state
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.LFE5:
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.Lfe5:
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.size do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
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.data
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ALIGN
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ENTRY(saved_rbp) .quad 0
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ENTRY(saved_rsi) .quad 0
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ENTRY(saved_rdi) .quad 0
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ENTRY(saved_rbx) .quad 0
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ENTRY(saved_rip) .quad 0
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ENTRY(saved_rsp) .quad 0
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ENTRY(saved_magic) .quad 0
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