54 lines
1.6 KiB
C
54 lines
1.6 KiB
C
/* arch/arm/mach-zynq/include/mach/zynq_soc.h
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*
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* Copyright (C) 2011 Xilinx
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MACH_XILINX_SOC_H__
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#define __MACH_XILINX_SOC_H__
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#include <asm/pgtable.h>
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#define PERIPHERAL_CLOCK_RATE 2500000
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/* Static peripheral mappings are mapped at the top of the vmalloc region. The
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* early uart mapping causes intermediate problems/failure at certain
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* addresses, including the very top of the vmalloc region. Map it at an
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* address that is known to work.
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*/
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#define UART0_PHYS 0xE0000000
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#define UART1_PHYS 0xE0001000
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#define UART_SIZE SZ_4K
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#define UART_VIRT 0xF0001000
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#define TTC0_PHYS 0xF8001000
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#define TTC0_SIZE SZ_4K
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#define TTC0_VIRT (VMALLOC_END - TTC0_SIZE)
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#define SCU_PERIPH_PHYS 0xF8F00000
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#define SCU_PERIPH_SIZE SZ_8K
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#define SCU_PERIPH_VIRT (TTC0_VIRT - SCU_PERIPH_SIZE)
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#if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1)
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# define LL_UART_PADDR UART1_PHYS
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#else
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# define LL_UART_PADDR UART0_PHYS
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#endif
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#define LL_UART_VADDR UART_VIRT
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/* The following are intended for the devices that are mapped early */
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#define TTC0_BASE IOMEM(TTC0_VIRT)
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#define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT)
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#endif
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