1cf215a5b4
Fix interrupt priority level handling on SH-Mobile ARM. SH-Mobile ARM platforms using multiple interrupt priority levels need this patch to fix a potential dead lock that may occur if multiple interrupts with different levels are pending simultaneously. The default INTC configuration is to use the same priority level for all interrupts, so this issue does not trigger by default. It is however common for board code to override the interrupt priority for certain interrupt sources depending on the application. Without this fix such boards may lock up. In detail, this patch updates the INTC code in entry-macro.S to make sure that the INTLVLA register gets set as expected. To trigger this bug modify the board specific code to adjust the interrupt priority level for the ethernet chip. After changing the priority level simply use flood ping to drown the board with interrupts. This patch applies to INTCA-based processors such as sh7372, sh7377 and sh7372. GIC-based processors are not affected. Suitable for v2.6.37-rc and stable from v2.6.34 to v2.6.36. Cc: stable@kernel.org Signed-off-by: Magnus Damm <damm@opensource.se> Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> |
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| .. | ||
| clkdev.h | ||
| common.h | ||
| dma.h | ||
| entry-macro.S | ||
| gpio.h | ||
| hardware.h | ||
| io.h | ||
| irqs.h | ||
| memory.h | ||
| sh7367.h | ||
| sh7372.h | ||
| sh7377.h | ||
| system.h | ||
| timex.h | ||
| uncompress.h | ||
| vmalloc.h | ||