d88746652b
This will simplify the MMC low-level init, and make it more flexible to add support for a newer MMC controller in the following patches. The patch rearranges platform data and gets rid of slot vs controller confusion in the old data structures. Also fix device id numbering in the clock code. Some code snippets are based on an earlier patch by Russell King <linux@arm.linux.org.uk>. Cc: Pierre Ossman <drzeus-mmc@drzeus.cx> Signed-off-by: Tony Lindgren <tony@atomide.com>
429 lines
9.3 KiB
C
429 lines
9.3 KiB
C
/*
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* linux/arch/arm/mach-omap2/devices.c
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*
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* OMAP2 platform device setup/initialization
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <mach/tc.h>
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#include <mach/board.h>
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#include <mach/mux.h>
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#include <mach/gpio.h>
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#include <mach/eac.h>
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#include <mach/mmc.h>
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#if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
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#define OMAP2_MBOX_BASE IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
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static struct resource mbox_resources[] = {
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{
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.start = OMAP2_MBOX_BASE,
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.end = OMAP2_MBOX_BASE + 0x11f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_24XX_MAIL_U0_MPU,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = INT_24XX_MAIL_U3_MPU,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mbox_device = {
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.name = "mailbox",
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.id = -1,
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.num_resources = ARRAY_SIZE(mbox_resources),
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.resource = mbox_resources,
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};
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static inline void omap_init_mbox(void)
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{
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platform_device_register(&mbox_device);
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}
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#else
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static inline void omap_init_mbox(void) { }
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#endif
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#if defined(CONFIG_OMAP_STI)
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#if defined(CONFIG_ARCH_OMAP2)
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#define OMAP2_STI_BASE 0x48068000
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#define OMAP2_STI_CHANNEL_BASE 0x54000000
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#define OMAP2_STI_IRQ 4
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static struct resource sti_resources[] = {
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{
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.start = OMAP2_STI_BASE,
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.end = OMAP2_STI_BASE + 0x7ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP2_STI_CHANNEL_BASE,
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.end = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP2_STI_IRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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#elif defined(CONFIG_ARCH_OMAP3)
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#define OMAP3_SDTI_BASE 0x54500000
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#define OMAP3_SDTI_CHANNEL_BASE 0x54600000
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static struct resource sti_resources[] = {
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{
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.start = OMAP3_SDTI_BASE,
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.end = OMAP3_SDTI_BASE + 0xFFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3_SDTI_CHANNEL_BASE,
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.end = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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#endif
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static struct platform_device sti_device = {
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.name = "sti",
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.id = -1,
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.num_resources = ARRAY_SIZE(sti_resources),
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.resource = sti_resources,
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};
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static inline void omap_init_sti(void)
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{
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platform_device_register(&sti_device);
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}
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#else
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static inline void omap_init_sti(void) {}
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#endif
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#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
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#include <mach/mcspi.h>
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#define OMAP2_MCSPI1_BASE 0x48098000
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#define OMAP2_MCSPI2_BASE 0x4809a000
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#define OMAP2_MCSPI3_BASE 0x480b8000
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#define OMAP2_MCSPI4_BASE 0x480ba000
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static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
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.num_cs = 4,
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};
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static struct resource omap2_mcspi1_resources[] = {
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{
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.start = OMAP2_MCSPI1_BASE,
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.end = OMAP2_MCSPI1_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi1 = {
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.name = "omap2_mcspi",
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.id = 1,
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.num_resources = ARRAY_SIZE(omap2_mcspi1_resources),
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.resource = omap2_mcspi1_resources,
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.dev = {
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.platform_data = &omap2_mcspi1_config,
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},
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};
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static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
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.num_cs = 2,
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};
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static struct resource omap2_mcspi2_resources[] = {
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{
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.start = OMAP2_MCSPI2_BASE,
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.end = OMAP2_MCSPI2_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi2 = {
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.name = "omap2_mcspi",
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.id = 2,
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.num_resources = ARRAY_SIZE(omap2_mcspi2_resources),
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.resource = omap2_mcspi2_resources,
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.dev = {
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.platform_data = &omap2_mcspi2_config,
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},
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};
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#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
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static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
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.num_cs = 2,
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};
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static struct resource omap2_mcspi3_resources[] = {
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{
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.start = OMAP2_MCSPI3_BASE,
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.end = OMAP2_MCSPI3_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi3 = {
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.name = "omap2_mcspi",
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.id = 3,
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.num_resources = ARRAY_SIZE(omap2_mcspi3_resources),
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.resource = omap2_mcspi3_resources,
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.dev = {
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.platform_data = &omap2_mcspi3_config,
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},
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
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.num_cs = 1,
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};
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static struct resource omap2_mcspi4_resources[] = {
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{
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.start = OMAP2_MCSPI4_BASE,
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.end = OMAP2_MCSPI4_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_mcspi4 = {
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.name = "omap2_mcspi",
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.id = 4,
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.num_resources = ARRAY_SIZE(omap2_mcspi4_resources),
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.resource = omap2_mcspi4_resources,
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.dev = {
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.platform_data = &omap2_mcspi4_config,
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},
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};
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#endif
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static void omap_init_mcspi(void)
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{
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platform_device_register(&omap2_mcspi1);
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platform_device_register(&omap2_mcspi2);
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#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
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platform_device_register(&omap2_mcspi3);
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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platform_device_register(&omap2_mcspi4);
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#endif
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}
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#else
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static inline void omap_init_mcspi(void) {}
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#endif
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#ifdef CONFIG_SND_OMAP24XX_EAC
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#define OMAP2_EAC_BASE 0x48090000
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static struct resource omap2_eac_resources[] = {
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{
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.start = OMAP2_EAC_BASE,
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.end = OMAP2_EAC_BASE + 0x109,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap2_eac_device = {
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.name = "omap24xx-eac",
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.id = -1,
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.num_resources = ARRAY_SIZE(omap2_eac_resources),
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.resource = omap2_eac_resources,
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.dev = {
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.platform_data = NULL,
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},
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};
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void omap_init_eac(struct eac_platform_data *pdata)
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{
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omap2_eac_device.dev.platform_data = pdata;
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platform_device_register(&omap2_eac_device);
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}
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#else
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void omap_init_eac(struct eac_platform_data *pdata) {}
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#endif
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#ifdef CONFIG_OMAP_SHA1_MD5
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static struct resource sha1_md5_resources[] = {
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{
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.start = OMAP24XX_SEC_SHA1MD5_BASE,
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.end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_24XX_SHA1MD5,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device sha1_md5_device = {
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.name = "OMAP SHA1/MD5",
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.id = -1,
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.num_resources = ARRAY_SIZE(sha1_md5_resources),
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.resource = sha1_md5_resources,
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};
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static void omap_init_sha1_md5(void)
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{
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platform_device_register(&sha1_md5_device);
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}
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#else
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static inline void omap_init_sha1_md5(void) { }
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
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defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
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static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
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int controller_nr)
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{
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if (cpu_is_omap2420() && controller_nr == 0) {
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omap_cfg_reg(H18_24XX_MMC_CMD);
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omap_cfg_reg(H15_24XX_MMC_CLKI);
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omap_cfg_reg(G19_24XX_MMC_CLKO);
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omap_cfg_reg(F20_24XX_MMC_DAT0);
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omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
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omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
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if (mmc_controller->slots[0].wire4) {
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omap_cfg_reg(H14_24XX_MMC_DAT1);
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omap_cfg_reg(E19_24XX_MMC_DAT2);
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omap_cfg_reg(D19_24XX_MMC_DAT3);
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omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
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omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
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omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
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}
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/*
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* Use internal loop-back in MMC/SDIO Module Input Clock
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* selection
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*/
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if (mmc_controller->slots[0].internal_clock) {
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u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
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v |= (1 << 24);
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omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
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}
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}
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}
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void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
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int nr_controllers)
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{
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int i;
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for (i = 0; i < nr_controllers; i++) {
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unsigned long base, size;
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unsigned int irq = 0;
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if (!mmc_data[i])
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continue;
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omap2_mmc_mux(mmc_data[i], i);
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switch (i) {
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case 0:
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base = OMAP2_MMC1_BASE;
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irq = INT_24XX_MMC_IRQ;
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break;
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case 1:
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base = OMAP2_MMC2_BASE;
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irq = INT_24XX_MMC2_IRQ;
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break;
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case 2:
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if (!cpu_is_omap34xx())
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return;
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base = OMAP3_MMC3_BASE;
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irq = INT_34XX_MMC3_IRQ;
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break;
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default:
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continue;
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}
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if (cpu_is_omap2420())
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size = OMAP2420_MMC_SIZE;
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else
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size = HSMMC_SIZE;
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omap_mmc_add(i, base, size, irq, mmc_data[i]);
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};
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}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
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#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
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#define OMAP_HDQ_BASE 0x480B2000
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#endif
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static struct resource omap_hdq_resources[] = {
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{
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.start = OMAP_HDQ_BASE,
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.end = OMAP_HDQ_BASE + 0x1C,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_24XX_HDQ_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device omap_hdq_dev = {
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.name = "omap_hdq",
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.id = 0,
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.dev = {
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.platform_data = NULL,
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},
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.num_resources = ARRAY_SIZE(omap_hdq_resources),
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.resource = omap_hdq_resources,
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};
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static inline void omap_hdq_init(void)
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{
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(void) platform_device_register(&omap_hdq_dev);
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}
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#else
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static inline void omap_hdq_init(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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static int __init omap2_init_devices(void)
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{
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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omap_init_mbox();
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omap_init_mcspi();
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omap_hdq_init();
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omap_init_sti();
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omap_init_sha1_md5();
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return 0;
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}
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arch_initcall(omap2_init_devices);
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