![Rusty Russell](/assets/img/avatar_default.png)
Fairly simple transformation: 1) cpumask_t -> cpumask_var_t and alloc_cpumask_var/free_cpumask_var (which are a NOOP unless CONFIG_CPUMASK_OFFSTACK=y). 2) cpu_set -> cpumask_set_cpu 3) cpus_weight -> cpumask_weight 4) cpu_clear -> cpumask_clear_cpu Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> To: Andy Henroid <andrew.d.henroid@intel.com>
617 lines
16 KiB
C
617 lines
16 KiB
C
/*
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* (C) Copyright 2008 Intel Corporation
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* Authors:
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* Andy Henroid <andrew.d.henroid@intel.com>
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* Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
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*/
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/*
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* Save DIMM power on Intel 7300-based platforms when all CPUs/cores
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* are idle, using the DIMM thermal throttling capability.
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*
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* This driver depends on the Intel integrated DMA controller (I/O AT).
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* If the driver for I/O AT (drivers/dma/ioatdma*) is also enabled,
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* this driver should work cooperatively.
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*/
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/* #define DEBUG */
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/notifier.h>
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#include <linux/cpumask.h>
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#include <linux/ktime.h>
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#include <linux/delay.h>
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#include <linux/debugfs.h>
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#include <linux/stop_machine.h>
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#include <linux/i7300_idle.h>
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#include <asm/idle.h>
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#include "../dma/ioat/hw.h"
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#include "../dma/ioat/registers.h"
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#define I7300_IDLE_DRIVER_VERSION "1.55"
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#define I7300_PRINT "i7300_idle:"
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#define MAX_STOP_RETRIES 10
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static int debug;
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module_param_named(debug, debug, uint, 0644);
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MODULE_PARM_DESC(debug, "Enable debug printks in this driver");
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static int forceload;
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module_param_named(forceload, forceload, uint, 0644);
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MODULE_PARM_DESC(debug, "Enable driver testing on unvalidated i5000");
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#define dprintk(fmt, arg...) \
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do { if (debug) printk(KERN_INFO I7300_PRINT fmt, ##arg); } while (0)
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/*
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* Value to set THRTLOW to when initiating throttling
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* 0 = No throttling
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* 1 = Throttle when > 4 activations per eval window (Maximum throttling)
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* 2 = Throttle when > 8 activations
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* 168 = Throttle when > 672 activations (Minimum throttling)
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*/
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#define MAX_THROTTLE_LOW_LIMIT 168
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static uint throttle_low_limit = 1;
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module_param_named(throttle_low_limit, throttle_low_limit, uint, 0644);
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MODULE_PARM_DESC(throttle_low_limit,
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"Value for THRTLOWLM activation field "
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"(0 = disable throttle, 1 = Max throttle, 168 = Min throttle)");
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/*
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* simple invocation and duration statistics
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*/
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static unsigned long total_starts;
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static unsigned long total_us;
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#ifdef DEBUG
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static unsigned long past_skip;
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#endif
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static struct pci_dev *fbd_dev;
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static spinlock_t i7300_idle_lock;
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static int i7300_idle_active;
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static u8 i7300_idle_thrtctl_saved;
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static u8 i7300_idle_thrtlow_saved;
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static u32 i7300_idle_mc_saved;
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static cpumask_var_t idle_cpumask;
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static ktime_t start_ktime;
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static unsigned long avg_idle_us;
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static struct dentry *debugfs_dir;
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/* Begin: I/O AT Helper routines */
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#define IOAT_CHANBASE(ioat_ctl, chan) (ioat_ctl + 0x80 + 0x80 * chan)
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/* Snoop control (disable snoops when coherency is not important) */
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#define IOAT_DESC_SADDR_SNP_CTL (1UL << 1)
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#define IOAT_DESC_DADDR_SNP_CTL (1UL << 2)
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static struct pci_dev *ioat_dev;
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static struct ioat_dma_descriptor *ioat_desc; /* I/O AT desc & data (1 page) */
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static unsigned long ioat_desc_phys;
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static u8 *ioat_iomap; /* I/O AT memory-mapped control regs (aka CB_BAR) */
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static u8 *ioat_chanbase;
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/* Start I/O AT memory copy */
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static int i7300_idle_ioat_start(void)
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{
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u32 err;
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/* Clear error (due to circular descriptor pointer) */
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err = readl(ioat_chanbase + IOAT_CHANERR_OFFSET);
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if (err)
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writel(err, ioat_chanbase + IOAT_CHANERR_OFFSET);
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writeb(IOAT_CHANCMD_START, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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return 0;
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}
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/* Stop I/O AT memory copy */
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static void i7300_idle_ioat_stop(void)
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{
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int i;
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u64 sts;
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for (i = 0; i < MAX_STOP_RETRIES; i++) {
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writeb(IOAT_CHANCMD_RESET,
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ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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udelay(10);
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sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
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IOAT_CHANSTS_STATUS;
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if (sts != IOAT_CHANSTS_ACTIVE)
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break;
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}
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if (i == MAX_STOP_RETRIES) {
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dprintk("failed to stop I/O AT after %d retries\n",
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MAX_STOP_RETRIES);
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}
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}
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/* Test I/O AT by copying 1024 byte from 2k to 1k */
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static int __init i7300_idle_ioat_selftest(u8 *ctl,
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struct ioat_dma_descriptor *desc, unsigned long desc_phys)
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{
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u64 chan_sts;
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memset(desc, 0, 2048);
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memset((u8 *) desc + 2048, 0xab, 1024);
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desc[0].size = 1024;
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desc[0].ctl = 0;
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desc[0].src_addr = desc_phys + 2048;
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desc[0].dst_addr = desc_phys + 1024;
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desc[0].next = 0;
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writeb(IOAT_CHANCMD_RESET, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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writeb(IOAT_CHANCMD_START, ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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udelay(1000);
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chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
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IOAT_CHANSTS_STATUS;
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if (chan_sts != IOAT_CHANSTS_DONE) {
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/* Not complete, reset the channel */
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writeb(IOAT_CHANCMD_RESET,
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ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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return -1;
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}
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if (*(u32 *) ((u8 *) desc + 3068) != 0xabababab ||
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*(u32 *) ((u8 *) desc + 2044) != 0xabababab) {
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dprintk("Data values src 0x%x, dest 0x%x, memset 0x%x\n",
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*(u32 *) ((u8 *) desc + 2048),
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*(u32 *) ((u8 *) desc + 1024),
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*(u32 *) ((u8 *) desc + 3072));
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return -1;
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}
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return 0;
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}
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static struct device dummy_dma_dev = {
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.init_name = "fallback device",
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.coherent_dma_mask = DMA_BIT_MASK(64),
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.dma_mask = &dummy_dma_dev.coherent_dma_mask,
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};
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/* Setup and initialize I/O AT */
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/* This driver needs I/O AT as the throttling takes effect only when there is
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* some memory activity. We use I/O AT to set up a dummy copy, while all CPUs
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* go idle and memory is throttled.
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*/
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static int __init i7300_idle_ioat_init(void)
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{
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u8 ver, chan_count, ioat_chan;
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u16 chan_ctl;
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ioat_iomap = (u8 *) ioremap_nocache(pci_resource_start(ioat_dev, 0),
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pci_resource_len(ioat_dev, 0));
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if (!ioat_iomap) {
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printk(KERN_ERR I7300_PRINT "failed to map I/O AT registers\n");
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goto err_ret;
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}
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ver = readb(ioat_iomap + IOAT_VER_OFFSET);
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if (ver != IOAT_VER_1_2) {
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printk(KERN_ERR I7300_PRINT "unknown I/O AT version (%u.%u)\n",
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ver >> 4, ver & 0xf);
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goto err_unmap;
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}
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chan_count = readb(ioat_iomap + IOAT_CHANCNT_OFFSET);
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if (!chan_count) {
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printk(KERN_ERR I7300_PRINT "unexpected # of I/O AT channels "
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"(%u)\n",
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chan_count);
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goto err_unmap;
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}
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ioat_chan = chan_count - 1;
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ioat_chanbase = IOAT_CHANBASE(ioat_iomap, ioat_chan);
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chan_ctl = readw(ioat_chanbase + IOAT_CHANCTRL_OFFSET);
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if (chan_ctl & IOAT_CHANCTRL_CHANNEL_IN_USE) {
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printk(KERN_ERR I7300_PRINT "channel %d in use\n", ioat_chan);
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goto err_unmap;
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}
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writew(IOAT_CHANCTRL_CHANNEL_IN_USE,
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ioat_chanbase + IOAT_CHANCTRL_OFFSET);
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ioat_desc = (struct ioat_dma_descriptor *)dma_alloc_coherent(
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&dummy_dma_dev, 4096,
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(dma_addr_t *)&ioat_desc_phys, GFP_KERNEL);
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if (!ioat_desc) {
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printk(KERN_ERR I7300_PRINT "failed to allocate I/O AT desc\n");
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goto err_mark_unused;
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}
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writel(ioat_desc_phys & 0xffffffffUL,
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ioat_chanbase + IOAT1_CHAINADDR_OFFSET_LOW);
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writel(ioat_desc_phys >> 32,
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ioat_chanbase + IOAT1_CHAINADDR_OFFSET_HIGH);
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if (i7300_idle_ioat_selftest(ioat_iomap, ioat_desc, ioat_desc_phys)) {
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printk(KERN_ERR I7300_PRINT "I/O AT self-test failed\n");
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goto err_free;
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}
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/* Setup circular I/O AT descriptor chain */
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ioat_desc[0].ctl = IOAT_DESC_SADDR_SNP_CTL | IOAT_DESC_DADDR_SNP_CTL;
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ioat_desc[0].src_addr = ioat_desc_phys + 2048;
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ioat_desc[0].dst_addr = ioat_desc_phys + 3072;
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ioat_desc[0].size = 128;
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ioat_desc[0].next = ioat_desc_phys + sizeof(struct ioat_dma_descriptor);
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ioat_desc[1].ctl = ioat_desc[0].ctl;
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ioat_desc[1].src_addr = ioat_desc[0].src_addr;
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ioat_desc[1].dst_addr = ioat_desc[0].dst_addr;
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ioat_desc[1].size = ioat_desc[0].size;
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ioat_desc[1].next = ioat_desc_phys;
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return 0;
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err_free:
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dma_free_coherent(&dummy_dma_dev, 4096, (void *)ioat_desc, 0);
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err_mark_unused:
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writew(0, ioat_chanbase + IOAT_CHANCTRL_OFFSET);
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err_unmap:
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iounmap(ioat_iomap);
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err_ret:
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return -ENODEV;
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}
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/* Cleanup I/O AT */
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static void __exit i7300_idle_ioat_exit(void)
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{
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int i;
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u64 chan_sts;
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i7300_idle_ioat_stop();
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/* Wait for a while for the channel to halt before releasing */
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for (i = 0; i < MAX_STOP_RETRIES; i++) {
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writeb(IOAT_CHANCMD_RESET,
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ioat_chanbase + IOAT1_CHANCMD_OFFSET);
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chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
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IOAT_CHANSTS_STATUS;
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if (chan_sts != IOAT_CHANSTS_ACTIVE) {
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writew(0, ioat_chanbase + IOAT_CHANCTRL_OFFSET);
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break;
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}
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udelay(1000);
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}
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chan_sts = readq(ioat_chanbase + IOAT1_CHANSTS_OFFSET) &
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IOAT_CHANSTS_STATUS;
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/*
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* We tried to reset multiple times. If IO A/T channel is still active
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* flag an error and return without cleanup. Memory leak is better
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* than random corruption in that extreme error situation.
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*/
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if (chan_sts == IOAT_CHANSTS_ACTIVE) {
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printk(KERN_ERR I7300_PRINT "Unable to stop IO A/T channels."
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" Not freeing resources\n");
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return;
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}
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dma_free_coherent(&dummy_dma_dev, 4096, (void *)ioat_desc, 0);
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iounmap(ioat_iomap);
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}
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/* End: I/O AT Helper routines */
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#define DIMM_THRTLOW 0x64
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#define DIMM_THRTCTL 0x67
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#define DIMM_THRTCTL_THRMHUNT (1UL << 0)
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#define DIMM_MC 0x40
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#define DIMM_GTW_MODE (1UL << 17)
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#define DIMM_GBLACT 0x60
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/*
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* Keep track of an exponential-decaying average of recent idle durations.
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* The latest duration gets DURATION_WEIGHT_PCT percentage weight
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* in this average, with the old average getting the remaining weight.
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*
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* High weights emphasize recent history, low weights include long history.
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*/
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#define DURATION_WEIGHT_PCT 55
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/*
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* When the decaying average of recent durations or the predicted duration
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* of the next timer interrupt is shorter than duration_threshold, the
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* driver will decline to throttle.
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*/
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#define DURATION_THRESHOLD_US 100
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/* Store DIMM thermal throttle configuration */
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static int i7300_idle_thrt_save(void)
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{
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u32 new_mc_val;
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u8 gblactlm;
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pci_read_config_byte(fbd_dev, DIMM_THRTCTL, &i7300_idle_thrtctl_saved);
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pci_read_config_byte(fbd_dev, DIMM_THRTLOW, &i7300_idle_thrtlow_saved);
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pci_read_config_dword(fbd_dev, DIMM_MC, &i7300_idle_mc_saved);
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/*
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* Make sure we have Global Throttling Window Mode set to have a
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* "short" window. This (mostly) works around an issue where
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* throttling persists until the end of the global throttling window
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* size. On the tested system, this was resulting in a maximum of
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* 64 ms to exit throttling (average 32 ms). The actual numbers
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* depends on system frequencies. Setting the short window reduces
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* this by a factor of 4096.
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*
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* We will only do this only if the system is set for
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* unlimited-activations while in open-loop throttling (i.e., when
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* Global Activation Throttle Limit is zero).
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*/
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pci_read_config_byte(fbd_dev, DIMM_GBLACT, &gblactlm);
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dprintk("thrtctl_saved = 0x%02x, thrtlow_saved = 0x%02x\n",
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i7300_idle_thrtctl_saved,
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i7300_idle_thrtlow_saved);
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dprintk("mc_saved = 0x%08x, gblactlm = 0x%02x\n",
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i7300_idle_mc_saved,
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gblactlm);
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if (gblactlm == 0) {
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new_mc_val = i7300_idle_mc_saved | DIMM_GTW_MODE;
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pci_write_config_dword(fbd_dev, DIMM_MC, new_mc_val);
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return 0;
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} else {
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dprintk("could not set GTW_MODE = 1 (OLTT enabled)\n");
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return -ENODEV;
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}
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}
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/* Restore DIMM thermal throttle configuration */
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static void i7300_idle_thrt_restore(void)
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{
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pci_write_config_dword(fbd_dev, DIMM_MC, i7300_idle_mc_saved);
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pci_write_config_byte(fbd_dev, DIMM_THRTLOW, i7300_idle_thrtlow_saved);
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pci_write_config_byte(fbd_dev, DIMM_THRTCTL, i7300_idle_thrtctl_saved);
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}
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/* Enable DIMM thermal throttling */
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static void i7300_idle_start(void)
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{
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u8 new_ctl;
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u8 limit;
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new_ctl = i7300_idle_thrtctl_saved & ~DIMM_THRTCTL_THRMHUNT;
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pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
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limit = throttle_low_limit;
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if (unlikely(limit > MAX_THROTTLE_LOW_LIMIT))
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limit = MAX_THROTTLE_LOW_LIMIT;
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pci_write_config_byte(fbd_dev, DIMM_THRTLOW, limit);
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new_ctl = i7300_idle_thrtctl_saved | DIMM_THRTCTL_THRMHUNT;
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pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
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}
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/* Disable DIMM thermal throttling */
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static void i7300_idle_stop(void)
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{
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u8 new_ctl;
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u8 got_ctl;
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new_ctl = i7300_idle_thrtctl_saved & ~DIMM_THRTCTL_THRMHUNT;
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pci_write_config_byte(fbd_dev, DIMM_THRTCTL, new_ctl);
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pci_write_config_byte(fbd_dev, DIMM_THRTLOW, i7300_idle_thrtlow_saved);
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pci_write_config_byte(fbd_dev, DIMM_THRTCTL, i7300_idle_thrtctl_saved);
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pci_read_config_byte(fbd_dev, DIMM_THRTCTL, &got_ctl);
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WARN_ON_ONCE(got_ctl != i7300_idle_thrtctl_saved);
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}
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/*
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* i7300_avg_duration_check()
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* return 0 if the decaying average of recent idle durations is
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* more than DURATION_THRESHOLD_US
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*/
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static int i7300_avg_duration_check(void)
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{
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if (avg_idle_us >= DURATION_THRESHOLD_US)
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return 0;
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#ifdef DEBUG
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past_skip++;
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#endif
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return 1;
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}
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/* Idle notifier to look at idle CPUs */
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static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val,
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void *data)
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{
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unsigned long flags;
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ktime_t now_ktime;
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static ktime_t idle_begin_time;
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static int time_init = 1;
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if (!throttle_low_limit)
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return 0;
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if (unlikely(time_init)) {
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time_init = 0;
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idle_begin_time = ktime_get();
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}
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spin_lock_irqsave(&i7300_idle_lock, flags);
|
|
if (val == IDLE_START) {
|
|
|
|
cpumask_set_cpu(smp_processor_id(), idle_cpumask);
|
|
|
|
if (cpumask_weight(idle_cpumask) != num_online_cpus())
|
|
goto end;
|
|
|
|
now_ktime = ktime_get();
|
|
idle_begin_time = now_ktime;
|
|
|
|
if (i7300_avg_duration_check())
|
|
goto end;
|
|
|
|
i7300_idle_active = 1;
|
|
total_starts++;
|
|
start_ktime = now_ktime;
|
|
|
|
i7300_idle_start();
|
|
i7300_idle_ioat_start();
|
|
|
|
} else if (val == IDLE_END) {
|
|
cpumask_clear_cpu(smp_processor_id(), idle_cpumask);
|
|
if (cpumask_weight(idle_cpumask) == (num_online_cpus() - 1)) {
|
|
/* First CPU coming out of idle */
|
|
u64 idle_duration_us;
|
|
|
|
now_ktime = ktime_get();
|
|
|
|
idle_duration_us = ktime_to_us(ktime_sub
|
|
(now_ktime, idle_begin_time));
|
|
|
|
avg_idle_us =
|
|
((100 - DURATION_WEIGHT_PCT) * avg_idle_us +
|
|
DURATION_WEIGHT_PCT * idle_duration_us) / 100;
|
|
|
|
if (i7300_idle_active) {
|
|
ktime_t idle_ktime;
|
|
|
|
idle_ktime = ktime_sub(now_ktime, start_ktime);
|
|
total_us += ktime_to_us(idle_ktime);
|
|
|
|
i7300_idle_ioat_stop();
|
|
i7300_idle_stop();
|
|
i7300_idle_active = 0;
|
|
}
|
|
}
|
|
}
|
|
end:
|
|
spin_unlock_irqrestore(&i7300_idle_lock, flags);
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block i7300_idle_nb = {
|
|
.notifier_call = i7300_idle_notifier,
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, pci_tbl);
|
|
|
|
int stats_open_generic(struct inode *inode, struct file *fp)
|
|
{
|
|
fp->private_data = inode->i_private;
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t stats_read_ul(struct file *fp, char __user *ubuf, size_t count,
|
|
loff_t *off)
|
|
{
|
|
unsigned long *p = fp->private_data;
|
|
char buf[32];
|
|
int len;
|
|
|
|
len = snprintf(buf, 32, "%lu\n", *p);
|
|
return simple_read_from_buffer(ubuf, count, off, buf, len);
|
|
}
|
|
|
|
static const struct file_operations idle_fops = {
|
|
.open = stats_open_generic,
|
|
.read = stats_read_ul,
|
|
};
|
|
|
|
struct debugfs_file_info {
|
|
void *ptr;
|
|
char name[32];
|
|
struct dentry *file;
|
|
} debugfs_file_list[] = {
|
|
{&total_starts, "total_starts", NULL},
|
|
{&total_us, "total_us", NULL},
|
|
#ifdef DEBUG
|
|
{&past_skip, "past_skip", NULL},
|
|
#endif
|
|
{NULL, "", NULL}
|
|
};
|
|
|
|
static int __init i7300_idle_init(void)
|
|
{
|
|
spin_lock_init(&i7300_idle_lock);
|
|
total_us = 0;
|
|
|
|
if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload))
|
|
return -ENODEV;
|
|
|
|
if (i7300_idle_thrt_save())
|
|
return -ENODEV;
|
|
|
|
if (i7300_idle_ioat_init())
|
|
return -ENODEV;
|
|
|
|
if (!zalloc_cpumask_var(&idle_cpumask, GFP_KERNEL))
|
|
return -ENOMEM;
|
|
|
|
debugfs_dir = debugfs_create_dir("i7300_idle", NULL);
|
|
if (debugfs_dir) {
|
|
int i = 0;
|
|
|
|
while (debugfs_file_list[i].ptr != NULL) {
|
|
debugfs_file_list[i].file = debugfs_create_file(
|
|
debugfs_file_list[i].name,
|
|
S_IRUSR,
|
|
debugfs_dir,
|
|
debugfs_file_list[i].ptr,
|
|
&idle_fops);
|
|
i++;
|
|
}
|
|
}
|
|
|
|
idle_notifier_register(&i7300_idle_nb);
|
|
|
|
printk(KERN_INFO "i7300_idle: loaded v%s\n", I7300_IDLE_DRIVER_VERSION);
|
|
return 0;
|
|
}
|
|
|
|
static void __exit i7300_idle_exit(void)
|
|
{
|
|
idle_notifier_unregister(&i7300_idle_nb);
|
|
free_cpumask_var(idle_cpumask);
|
|
|
|
if (debugfs_dir) {
|
|
int i = 0;
|
|
|
|
while (debugfs_file_list[i].file != NULL) {
|
|
debugfs_remove(debugfs_file_list[i].file);
|
|
i++;
|
|
}
|
|
|
|
debugfs_remove(debugfs_dir);
|
|
}
|
|
i7300_idle_thrt_restore();
|
|
i7300_idle_ioat_exit();
|
|
}
|
|
|
|
module_init(i7300_idle_init);
|
|
module_exit(i7300_idle_exit);
|
|
|
|
MODULE_AUTHOR("Andy Henroid <andrew.d.henroid@intel.com>");
|
|
MODULE_DESCRIPTION("Intel Chipset DIMM Idle Power Saving Driver v"
|
|
I7300_IDLE_DRIVER_VERSION);
|
|
MODULE_LICENSE("GPL");
|