296 lines
7.5 KiB
C
296 lines
7.5 KiB
C
/*
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* File: include/asm/system.h
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* Based on:
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* Author: Tony Kou (tonyko@lineo.ca)
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* Copyright (c) 2002 Arcturus Networks Inc.
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* (www.arcturusnetworks.com)
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* Copyright (c) 2003 Metrowerks (www.metrowerks.com)
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* Copyright (c) 2004 Analog Device Inc.
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* Created: 25Jan2001 - Tony Kou
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* Description: system.h include file
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*
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* Modified: 22Sep2006 - Robin Getz
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* - move include blackfin.h down, so I can get access to
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* irq functions in other include files.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING.
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* If not, write to the Free Software Foundation,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _BLACKFIN_SYSTEM_H
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#define _BLACKFIN_SYSTEM_H
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#include <linux/linkage.h>
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#include <linux/compiler.h>
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#include <mach/anomaly.h>
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#include <asm/pda.h>
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#include <asm/processor.h>
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/* Forward decl needed due to cdef inter dependencies */
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static inline uint32_t __pure bfin_dspid(void);
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#define blackfin_core_id() (bfin_dspid() & 0xff)
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/*
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* Interrupt configuring macros.
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*/
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#define local_irq_disable() \
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do { \
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int __tmp_dummy; \
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__asm__ __volatile__( \
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"cli %0;" \
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: "=d" (__tmp_dummy) \
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); \
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} while (0)
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#if ANOMALY_05000244 && defined(CONFIG_BFIN_ICACHE)
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# define NOP_PAD_ANOMALY_05000244 "nop; nop;"
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#else
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# define NOP_PAD_ANOMALY_05000244
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#endif
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#ifdef CONFIG_SMP
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# define irq_flags cpu_pda[blackfin_core_id()].imask
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#else
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extern unsigned long irq_flags;
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#endif
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#define local_irq_enable() \
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__asm__ __volatile__( \
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"sti %0;" \
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: \
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: "d" (irq_flags) \
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)
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#define idle_with_irq_disabled() \
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__asm__ __volatile__( \
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NOP_PAD_ANOMALY_05000244 \
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".align 8;" \
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"sti %0;" \
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"idle;" \
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: \
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: "d" (irq_flags) \
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)
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#ifdef CONFIG_DEBUG_HWERR
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# define __save_and_cli(x) \
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__asm__ __volatile__( \
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"cli %0;" \
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"sti %1;" \
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: "=&d" (x) \
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: "d" (0x3F) \
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)
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#else
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# define __save_and_cli(x) \
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__asm__ __volatile__( \
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"cli %0;" \
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: "=&d" (x) \
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)
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#endif
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#define local_save_flags(x) \
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__asm__ __volatile__( \
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"cli %0;" \
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"sti %0;" \
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: "=d" (x) \
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)
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#ifdef CONFIG_DEBUG_HWERR
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#define irqs_enabled_from_flags(x) (((x) & ~0x3f) != 0)
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#else
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#define irqs_enabled_from_flags(x) ((x) != 0x1f)
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#endif
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#define local_irq_restore(x) \
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do { \
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if (irqs_enabled_from_flags(x)) \
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local_irq_enable(); \
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} while (0)
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/* For spinlocks etc */
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#define local_irq_save(x) __save_and_cli(x)
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#define irqs_disabled() \
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({ \
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unsigned long flags; \
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local_save_flags(flags); \
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!irqs_enabled_from_flags(flags); \
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})
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/*
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* Force strict CPU ordering.
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*/
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#define nop() asm volatile ("nop;\n\t"::)
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#define mb() asm volatile ("" : : :"memory")
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#define rmb() asm volatile ("" : : :"memory")
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#define wmb() asm volatile ("" : : :"memory")
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#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
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#define read_barrier_depends() do { } while(0)
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#ifdef CONFIG_SMP
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asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
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asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
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asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
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asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
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unsigned long new, unsigned long old);
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asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
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unsigned long new, unsigned long old);
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asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
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unsigned long new, unsigned long old);
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#ifdef __ARCH_SYNC_CORE_DCACHE
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# define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
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# define smp_rmb() do { barrier(); smp_check_barrier(); } while (0)
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# define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0)
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#else
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# define smp_mb() barrier()
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# define smp_rmb() barrier()
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# define smp_wmb() barrier()
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#endif
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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int size)
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{
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unsigned long tmp;
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switch (size) {
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case 1:
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tmp = __raw_xchg_1_asm(ptr, x);
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break;
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case 2:
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tmp = __raw_xchg_2_asm(ptr, x);
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break;
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case 4:
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tmp = __raw_xchg_4_asm(ptr, x);
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break;
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}
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return tmp;
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}
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/*
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*/
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static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
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unsigned long new, int size)
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{
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unsigned long tmp;
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switch (size) {
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case 1:
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tmp = __raw_cmpxchg_1_asm(ptr, new, old);
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break;
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case 2:
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tmp = __raw_cmpxchg_2_asm(ptr, new, old);
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break;
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case 4:
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tmp = __raw_cmpxchg_4_asm(ptr, new, old);
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break;
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}
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return tmp;
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}
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#define cmpxchg(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr))))
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#define smp_read_barrier_depends() smp_check_barrier()
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#else /* !CONFIG_SMP */
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_read_barrier_depends() do { } while(0)
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struct __xchg_dummy {
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unsigned long a[100];
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};
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#define __xg(x) ((volatile struct __xchg_dummy *)(x))
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static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
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int size)
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{
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unsigned long tmp = 0;
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unsigned long flags = 0;
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local_irq_save(flags);
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switch (size) {
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case 1:
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__asm__ __volatile__
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("%0 = b%2 (z);\n\t"
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"b%2 = %1;\n\t"
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: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
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break;
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case 2:
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__asm__ __volatile__
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("%0 = w%2 (z);\n\t"
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"w%2 = %1;\n\t"
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: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
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break;
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case 4:
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__asm__ __volatile__
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("%0 = %2;\n\t"
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"%2 = %1;\n\t"
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: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
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break;
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}
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local_irq_restore(flags);
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return tmp;
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}
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#include <asm-generic/cmpxchg-local.h>
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/*
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* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
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* them available.
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*/
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#define cmpxchg_local(ptr, o, n) \
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((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
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(unsigned long)(n), sizeof(*(ptr))))
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#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
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#include <asm-generic/cmpxchg.h>
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#endif /* !CONFIG_SMP */
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#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
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#define tas(ptr) ((void)xchg((ptr), 1))
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#define prepare_to_switch() do { } while(0)
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/*
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* switch_to(n) should switch tasks to task ptr, first checking that
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* ptr isn't the current task, in which case it does nothing.
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*/
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#include <asm/blackfin.h>
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asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
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#define switch_to(prev,next,last) \
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do { \
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memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
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sizeof *L1_SCRATCH_TASK_INFO); \
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memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
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sizeof *L1_SCRATCH_TASK_INFO); \
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(last) = resume (prev, next); \
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} while (0)
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#endif /* _BLACKFIN_SYSTEM_H */
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