![Randy Dunlap](/assets/img/avatar_default.png)
Fix comments typos in new x86 boot code. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
171 lines
3.9 KiB
C
171 lines
3.9 KiB
C
/* -*- linux-c -*- ------------------------------------------------------- *
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*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright 2007 rPath, Inc. - All Rights Reserved
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*
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* This file is part of the Linux kernel, and is made available under
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* the terms of the GNU General Public License version 2.
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*
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* ----------------------------------------------------------------------- */
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/*
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* arch/i386/boot/pm.c
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*
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* Prepare the machine for transition to protected mode.
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*/
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#include "boot.h"
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#include <asm/segment.h>
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/*
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* Invoke the realmode switch hook if present; otherwise
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* disable all interrupts.
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*/
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static void realmode_switch_hook(void)
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{
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if (boot_params.hdr.realmode_swtch) {
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asm volatile("lcallw *%0"
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: : "m" (boot_params.hdr.realmode_swtch)
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: "eax", "ebx", "ecx", "edx");
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} else {
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asm volatile("cli");
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outb(0x80, 0x70); /* Disable NMI */
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io_delay();
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}
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}
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/*
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* A zImage kernel is loaded at 0x10000 but wants to run at 0x1000.
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* A bzImage kernel is loaded and runs at 0x100000.
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*/
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static void move_kernel_around(void)
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{
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/* Note: rely on the compile-time option here rather than
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the LOADED_HIGH flag. The Qemu kernel loader unconditionally
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sets the loadflags to zero. */
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#ifndef __BIG_KERNEL__
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u16 dst_seg, src_seg;
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u32 syssize;
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dst_seg = 0x1000 >> 4;
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src_seg = 0x10000 >> 4;
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syssize = boot_params.hdr.syssize; /* Size in 16-byte paragraphs */
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while (syssize) {
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int paras = (syssize >= 0x1000) ? 0x1000 : syssize;
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int dwords = paras << 2;
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asm volatile("pushw %%es ; "
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"pushw %%ds ; "
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"movw %1,%%es ; "
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"movw %2,%%ds ; "
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"xorw %%di,%%di ; "
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"xorw %%si,%%si ; "
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"rep;movsl ; "
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"popw %%ds ; "
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"popw %%es"
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: "+c" (dwords)
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: "r" (dst_seg), "r" (src_seg)
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: "esi", "edi");
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syssize -= paras;
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dst_seg += paras;
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src_seg += paras;
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}
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#endif
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}
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/*
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* Disable all interrupts at the legacy PIC.
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*/
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static void mask_all_interrupts(void)
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{
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outb(0xff, 0xa1); /* Mask all interrupts on the secondary PIC */
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io_delay();
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outb(0xfb, 0x21); /* Mask all but cascade on the primary PIC */
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io_delay();
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}
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/*
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* Reset IGNNE# if asserted in the FPU.
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*/
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static void reset_coprocessor(void)
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{
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outb(0, 0xf0);
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io_delay();
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outb(0, 0xf1);
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io_delay();
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}
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/*
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* Set up the GDT
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*/
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#define GDT_ENTRY(flags,base,limit) \
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(((u64)(base & 0xff000000) << 32) | \
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((u64)flags << 40) | \
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((u64)(limit & 0x00ff0000) << 32) | \
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((u64)(base & 0x00ffff00) << 16) | \
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((u64)(limit & 0x0000ffff)))
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struct gdt_ptr {
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u16 len;
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u32 ptr;
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} __attribute__((packed));
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static void setup_gdt(void)
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{
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/* There are machines which are known to not boot with the GDT
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being 8-byte unaligned. Intel recommends 16 byte alignment. */
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static const u64 boot_gdt[] __attribute__((aligned(16))) = {
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/* CS: code, read/execute, 4 GB, base 0 */
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[GDT_ENTRY_BOOT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
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/* DS: data, read/write, 4 GB, base 0 */
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[GDT_ENTRY_BOOT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
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};
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struct gdt_ptr gdt;
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gdt.len = sizeof(boot_gdt)-1;
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gdt.ptr = (u32)&boot_gdt + (ds() << 4);
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asm volatile("lgdtl %0" : : "m" (gdt));
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}
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/*
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* Set up the IDT
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*/
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static void setup_idt(void)
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{
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static const struct gdt_ptr null_idt = {0, 0};
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asm volatile("lidtl %0" : : "m" (null_idt));
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}
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/*
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* Actual invocation sequence
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*/
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void go_to_protected_mode(void)
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{
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/* Hook before leaving real mode, also disables interrupts */
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realmode_switch_hook();
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/* Move the kernel/setup to their final resting places */
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move_kernel_around();
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/* Enable the A20 gate */
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if (enable_a20()) {
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puts("A20 gate not responding, unable to boot...\n");
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die();
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}
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/* Reset coprocessor (IGNNE#) */
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reset_coprocessor();
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/* Mask all interrupts in the PIC */
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mask_all_interrupts();
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/* Actual transition to protected mode... */
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setup_idt();
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setup_gdt();
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protected_mode_jump(boot_params.hdr.code32_start,
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(u32)&boot_params + (ds() << 4));
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}
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