![Jörn Engel](/assets/img/avatar_default.png)
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
168 lines
4.8 KiB
C
168 lines
4.8 KiB
C
/* cpu.c: Dinky routines to look for the kind of Sparc cpu
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* we are on.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/threads.h>
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#include <asm/oplib.h>
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#include <asm/page.h>
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#include <asm/head.h>
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#include <asm/psr.h>
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#include <asm/mbus.h>
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#include <asm/cpudata.h>
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DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
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struct cpu_iu_info {
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int psr_impl;
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int psr_vers;
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char* cpu_name; /* should be enough I hope... */
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};
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struct cpu_fp_info {
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int psr_impl;
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int fp_vers;
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char* fp_name;
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};
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/* In order to get the fpu type correct, you need to take the IDPROM's
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* machine type value into consideration too. I will fix this.
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*/
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struct cpu_fp_info linux_sparc_fpu[] = {
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{ 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"},
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{ 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"},
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{ 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"},
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/* SparcStation SLC, SparcStation1 */
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{ 0, 3, "Weitek WTL3170/2"},
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/* SPARCstation-5 */
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{ 0, 4, "Lsi Logic/Meiko L64804 or compatible"},
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{ 0, 5, "reserved"},
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{ 0, 6, "reserved"},
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{ 0, 7, "No FPU"},
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{ 1, 0, "ROSS HyperSparc combined IU/FPU"},
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{ 1, 1, "Lsi Logic L64814"},
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{ 1, 2, "Texas Instruments TMS390-C602A"},
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{ 1, 3, "Cypress CY7C602 FPU"},
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{ 1, 4, "reserved"},
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{ 1, 5, "reserved"},
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{ 1, 6, "reserved"},
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{ 1, 7, "No FPU"},
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{ 2, 0, "BIT B5010 or B5110/20 or B5210"},
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{ 2, 1, "reserved"},
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{ 2, 2, "reserved"},
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{ 2, 3, "reserved"},
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{ 2, 4, "reserved"},
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{ 2, 5, "reserved"},
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{ 2, 6, "reserved"},
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{ 2, 7, "No FPU"},
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/* SuperSparc 50 module */
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{ 4, 0, "SuperSparc on-chip FPU"},
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/* SparcClassic */
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{ 4, 4, "TI MicroSparc on chip FPU"},
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{ 5, 0, "Matsushita MN10501"},
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{ 5, 1, "reserved"},
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{ 5, 2, "reserved"},
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{ 5, 3, "reserved"},
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{ 5, 4, "reserved"},
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{ 5, 5, "reserved"},
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{ 5, 6, "reserved"},
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{ 5, 7, "No FPU"},
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{ 9, 3, "Fujitsu or Weitek on-chip FPU"},
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};
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#define NSPARCFPU ARRAY_SIZE(linux_sparc_fpu)
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struct cpu_iu_info linux_sparc_chips[] = {
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/* Sun4/100, 4/200, SLC */
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{ 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"},
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/* borned STP1012PGA */
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{ 0, 4, "Fujitsu MB86904"},
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{ 0, 5, "Fujitsu TurboSparc MB86907"},
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/* SparcStation2, SparcServer 490 & 690 */
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{ 1, 0, "LSI Logic Corporation - L64811"},
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/* SparcStation2 */
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{ 1, 1, "Cypress/ROSS CY7C601"},
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/* Embedded controller */
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{ 1, 3, "Cypress/ROSS CY7C611"},
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/* Ross Technologies HyperSparc */
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{ 1, 0xf, "ROSS HyperSparc RT620"},
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{ 1, 0xe, "ROSS HyperSparc RT625 or RT626"},
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/* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */
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/* Someone please write the code to support this beast! ;) */
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{ 2, 0, "Bipolar Integrated Technology - B5010"},
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{ 3, 0, "LSI Logic Corporation - unknown-type"},
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{ 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"},
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/* SparcClassic -- borned STP1010TAB-50*/
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{ 4, 1, "Texas Instruments, Inc. - MicroSparc"},
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{ 4, 2, "Texas Instruments, Inc. - MicroSparc II"},
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{ 4, 3, "Texas Instruments, Inc. - SuperSparc 51"},
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{ 4, 4, "Texas Instruments, Inc. - SuperSparc 61"},
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{ 4, 5, "Texas Instruments, Inc. - unknown"},
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{ 5, 0, "Matsushita - MN10501"},
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{ 6, 0, "Philips Corporation - unknown"},
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{ 7, 0, "Harvest VLSI Design Center, Inc. - unknown"},
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/* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */
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{ 8, 0, "Systems and Processes Engineering Corporation (SPEC)"},
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{ 9, 0, "Fujitsu or Weitek Power-UP"},
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{ 9, 1, "Fujitsu or Weitek Power-UP"},
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{ 9, 2, "Fujitsu or Weitek Power-UP"},
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{ 9, 3, "Fujitsu or Weitek Power-UP"},
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{ 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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{ 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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{ 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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{ 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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{ 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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{ 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"},
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};
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#define NSPARCCHIPS ARRAY_SIZE(linux_sparc_chips)
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char *sparc_cpu_type;
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char *sparc_fpu_type;
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unsigned int fsr_storage;
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void __init cpu_probe(void)
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{
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int psr_impl, psr_vers, fpu_vers;
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int i, psr;
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psr_impl = ((get_psr()>>28)&0xf);
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psr_vers = ((get_psr()>>24)&0xf);
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psr = get_psr();
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put_psr(psr | PSR_EF);
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fpu_vers = ((get_fsr()>>17)&0x7);
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put_psr(psr);
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for(i = 0; i<NSPARCCHIPS; i++) {
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if(linux_sparc_chips[i].psr_impl == psr_impl)
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if(linux_sparc_chips[i].psr_vers == psr_vers) {
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sparc_cpu_type = linux_sparc_chips[i].cpu_name;
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break;
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}
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}
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if(i==NSPARCCHIPS)
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printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl,
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psr_vers);
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for(i = 0; i<NSPARCFPU; i++) {
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if(linux_sparc_fpu[i].psr_impl == psr_impl)
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if(linux_sparc_fpu[i].fp_vers == fpu_vers) {
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sparc_fpu_type = linux_sparc_fpu[i].fp_name;
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break;
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}
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}
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if(i == NSPARCFPU) {
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printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl,
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fpu_vers);
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sparc_fpu_type = linux_sparc_fpu[31].fp_name;
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}
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}
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