![David Brownell](/assets/img/avatar_default.png)
This fixes two problems triggered by the MMC stack updating clocks: - SPI masters driver should accept a max clock speed of zero; that's one convention for marking idle devices. (Presumably that helps controllers that don't autogate clocks to "off" when not in use.) - There are more than 1000 nanoseconds per millisecond; setting the clock down to 125 KHz now works properly. Showing once again that Zero (http://en.wikipedia.org/wiki/Zero) is still an inexhaustible number of bugs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
537 lines
14 KiB
C
537 lines
14 KiB
C
/*
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* spi_bitbang.c - polling/bitbanging SPI master controller driver utilities
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi_bitbang.h>
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/*----------------------------------------------------------------------*/
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/*
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* FIRST PART (OPTIONAL): word-at-a-time spi_transfer support.
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* Use this for GPIO or shift-register level hardware APIs.
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*
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* spi_bitbang_cs is in spi_device->controller_state, which is unavailable
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* to glue code. These bitbang setup() and cleanup() routines are always
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* used, though maybe they're called from controller-aware code.
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*
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* chipselect() and friends may use use spi_device->controller_data and
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* controller registers as appropriate.
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*
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*
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* NOTE: SPI controller pins can often be used as GPIO pins instead,
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* which means you could use a bitbang driver either to get hardware
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* working quickly, or testing for differences that aren't speed related.
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*/
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struct spi_bitbang_cs {
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unsigned nsecs; /* (clock cycle time)/2 */
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u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs,
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u32 word, u8 bits);
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unsigned (*txrx_bufs)(struct spi_device *,
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u32 (*txrx_word)(
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struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits),
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unsigned, struct spi_transfer *);
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};
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static unsigned bitbang_txrx_8(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits),
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unsigned ns,
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struct spi_transfer *t
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) {
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unsigned bits = spi->bits_per_word;
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unsigned count = t->len;
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const u8 *tx = t->tx_buf;
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u8 *rx = t->rx_buf;
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while (likely(count > 0)) {
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u8 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits);
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if (rx)
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*rx++ = word;
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count -= 1;
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}
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return t->len - count;
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}
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static unsigned bitbang_txrx_16(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits),
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unsigned ns,
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struct spi_transfer *t
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) {
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unsigned bits = spi->bits_per_word;
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unsigned count = t->len;
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const u16 *tx = t->tx_buf;
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u16 *rx = t->rx_buf;
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while (likely(count > 1)) {
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u16 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits);
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if (rx)
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*rx++ = word;
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count -= 2;
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}
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return t->len - count;
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}
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static unsigned bitbang_txrx_32(
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struct spi_device *spi,
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u32 (*txrx_word)(struct spi_device *spi,
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unsigned nsecs,
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u32 word, u8 bits),
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unsigned ns,
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struct spi_transfer *t
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) {
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unsigned bits = spi->bits_per_word;
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unsigned count = t->len;
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const u32 *tx = t->tx_buf;
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u32 *rx = t->rx_buf;
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while (likely(count > 3)) {
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u32 word = 0;
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if (tx)
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word = *tx++;
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word = txrx_word(spi, ns, word, bits);
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if (rx)
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*rx++ = word;
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count -= 4;
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}
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return t->len - count;
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}
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int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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u8 bits_per_word;
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u32 hz;
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if (t) {
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bits_per_word = t->bits_per_word;
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hz = t->speed_hz;
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} else {
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bits_per_word = 0;
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hz = 0;
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}
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/* spi_transfer level calls that work per-word */
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if (!bits_per_word)
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bits_per_word = spi->bits_per_word;
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if (bits_per_word <= 8)
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cs->txrx_bufs = bitbang_txrx_8;
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else if (bits_per_word <= 16)
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cs->txrx_bufs = bitbang_txrx_16;
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else if (bits_per_word <= 32)
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cs->txrx_bufs = bitbang_txrx_32;
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else
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return -EINVAL;
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/* nsecs = (clock period)/2 */
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if (!hz)
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hz = spi->max_speed_hz;
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if (hz) {
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cs->nsecs = (1000000000/2) / hz;
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if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000))
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return -EINVAL;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer);
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/**
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* spi_bitbang_setup - default setup for per-word I/O loops
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*/
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int spi_bitbang_setup(struct spi_device *spi)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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struct spi_bitbang *bitbang;
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int retval;
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bitbang = spi_master_get_devdata(spi->master);
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/* REVISIT: some systems will want to support devices using lsb-first
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* bit encodings on the wire. In pure software that would be trivial,
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* just bitbang_txrx_le_cphaX() routines shifting the other way, and
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* some hardware controllers also have this support.
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*/
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if ((spi->mode & SPI_LSB_FIRST) != 0)
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return -EINVAL;
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if (!cs) {
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cs = kzalloc(sizeof *cs, SLAB_KERNEL);
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if (!cs)
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return -ENOMEM;
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spi->controller_state = cs;
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}
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if (!spi->bits_per_word)
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spi->bits_per_word = 8;
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/* per-word shift register access, in hardware or bitbanging */
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cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)];
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if (!cs->txrx_word)
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return -EINVAL;
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retval = spi_bitbang_setup_transfer(spi, NULL);
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if (retval < 0)
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return retval;
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dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
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__FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA),
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spi->bits_per_word, 2 * cs->nsecs);
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/* NOTE we _need_ to call chipselect() early, ideally with adapter
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* setup, unless the hardware defaults cooperate to avoid confusion
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* between normal (active low) and inverted chipselects.
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*/
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/* deselect chip (low or high) */
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spin_lock(&bitbang->lock);
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if (!bitbang->busy) {
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(cs->nsecs);
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}
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spin_unlock(&bitbang->lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_setup);
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/**
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* spi_bitbang_cleanup - default cleanup for per-word I/O loops
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*/
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void spi_bitbang_cleanup(const struct spi_device *spi)
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{
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kfree(spi->controller_state);
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_cleanup);
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static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
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{
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struct spi_bitbang_cs *cs = spi->controller_state;
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unsigned nsecs = cs->nsecs;
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return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t);
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}
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/*----------------------------------------------------------------------*/
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/*
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* SECOND PART ... simple transfer queue runner.
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*
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* This costs a task context per controller, running the queue by
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* performing each transfer in sequence. Smarter hardware can queue
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* several DMA transfers at once, and process several controller queues
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* in parallel; this driver doesn't match such hardware very well.
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*
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* Drivers can provide word-at-a-time i/o primitives, or provide
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* transfer-at-a-time ones to leverage dma or fifo hardware.
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*/
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static void bitbang_work(void *_bitbang)
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{
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struct spi_bitbang *bitbang = _bitbang;
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unsigned long flags;
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spin_lock_irqsave(&bitbang->lock, flags);
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bitbang->busy = 1;
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while (!list_empty(&bitbang->queue)) {
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struct spi_message *m;
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struct spi_device *spi;
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unsigned nsecs;
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struct spi_transfer *t = NULL;
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unsigned tmp;
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unsigned cs_change;
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int status;
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int (*setup_transfer)(struct spi_device *,
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struct spi_transfer *);
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m = container_of(bitbang->queue.next, struct spi_message,
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queue);
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list_del_init(&m->queue);
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spin_unlock_irqrestore(&bitbang->lock, flags);
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/* FIXME this is made-up ... the correct value is known to
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* word-at-a-time bitbang code, and presumably chipselect()
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* should enforce these requirements too?
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*/
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nsecs = 100;
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spi = m->spi;
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tmp = 0;
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cs_change = 1;
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status = 0;
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setup_transfer = NULL;
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list_for_each_entry (t, &m->transfers, transfer_list) {
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if (bitbang->shutdown) {
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status = -ESHUTDOWN;
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break;
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}
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/* override or restore speed and wordsize */
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if (t->speed_hz || t->bits_per_word) {
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setup_transfer = bitbang->setup_transfer;
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if (!setup_transfer) {
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status = -ENOPROTOOPT;
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break;
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}
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}
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if (setup_transfer) {
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status = setup_transfer(spi, t);
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if (status < 0)
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break;
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}
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/* set up default clock polarity, and activate chip;
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* this implicitly updates clock and spi modes as
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* previously recorded for this device via setup().
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* (and also deselects any other chip that might be
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* selected ...)
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*/
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if (cs_change) {
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bitbang->chipselect(spi, BITBANG_CS_ACTIVE);
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ndelay(nsecs);
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}
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cs_change = t->cs_change;
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if (!t->tx_buf && !t->rx_buf && t->len) {
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status = -EINVAL;
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break;
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}
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/* transfer data. the lower level code handles any
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* new dma mappings it needs. our caller always gave
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* us dma-safe buffers.
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*/
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if (t->len) {
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/* REVISIT dma API still needs a designated
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* DMA_ADDR_INVALID; ~0 might be better.
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*/
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if (!m->is_dma_mapped)
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t->rx_dma = t->tx_dma = 0;
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status = bitbang->txrx_bufs(spi, t);
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}
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if (status != t->len) {
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if (status > 0)
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status = -EMSGSIZE;
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break;
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}
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m->actual_length += status;
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status = 0;
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/* protocol tweaks before next transfer */
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if (t->delay_usecs)
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udelay(t->delay_usecs);
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if (!cs_change)
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continue;
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if (t->transfer_list.next == &m->transfers)
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break;
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/* sometimes a short mid-message deselect of the chip
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* may be needed to terminate a mode or command
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*/
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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m->status = status;
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m->complete(m->context);
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/* restore speed and wordsize */
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if (setup_transfer)
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setup_transfer(spi, NULL);
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/* normally deactivate chipselect ... unless no error and
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* cs_change has hinted that the next message will probably
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* be for this chip too.
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*/
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if (!(status == 0 && cs_change)) {
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ndelay(nsecs);
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bitbang->chipselect(spi, BITBANG_CS_INACTIVE);
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ndelay(nsecs);
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}
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spin_lock_irqsave(&bitbang->lock, flags);
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}
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bitbang->busy = 0;
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spin_unlock_irqrestore(&bitbang->lock, flags);
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}
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/**
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* spi_bitbang_transfer - default submit to transfer queue
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*/
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int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m)
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{
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struct spi_bitbang *bitbang;
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unsigned long flags;
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int status = 0;
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m->actual_length = 0;
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m->status = -EINPROGRESS;
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bitbang = spi_master_get_devdata(spi->master);
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if (bitbang->shutdown)
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return -ESHUTDOWN;
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spin_lock_irqsave(&bitbang->lock, flags);
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if (!spi->max_speed_hz)
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status = -ENETDOWN;
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else {
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list_add_tail(&m->queue, &bitbang->queue);
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queue_work(bitbang->workqueue, &bitbang->work);
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}
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spin_unlock_irqrestore(&bitbang->lock, flags);
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return status;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_transfer);
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/*----------------------------------------------------------------------*/
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/**
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* spi_bitbang_start - start up a polled/bitbanging SPI master driver
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* @bitbang: driver handle
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*
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* Caller should have zero-initialized all parts of the structure, and then
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* provided callbacks for chip selection and I/O loops. If the master has
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* a transfer method, its final step should call spi_bitbang_transfer; or,
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* that's the default if the transfer routine is not initialized. It should
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* also set up the bus number and number of chipselects.
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*
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* For i/o loops, provide callbacks either per-word (for bitbanging, or for
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* hardware that basically exposes a shift register) or per-spi_transfer
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* (which takes better advantage of hardware like fifos or DMA engines).
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*
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* Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and
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* spi_bitbang_cleanup to handle those spi master methods. Those methods are
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* the defaults if the bitbang->txrx_bufs routine isn't initialized.
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*
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* This routine registers the spi_master, which will process requests in a
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* dedicated task, keeping IRQs unblocked most of the time. To stop
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* processing those requests, call spi_bitbang_stop().
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*/
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int spi_bitbang_start(struct spi_bitbang *bitbang)
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{
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int status;
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if (!bitbang->master || !bitbang->chipselect)
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return -EINVAL;
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INIT_WORK(&bitbang->work, bitbang_work, bitbang);
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spin_lock_init(&bitbang->lock);
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INIT_LIST_HEAD(&bitbang->queue);
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if (!bitbang->master->transfer)
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bitbang->master->transfer = spi_bitbang_transfer;
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if (!bitbang->txrx_bufs) {
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bitbang->use_dma = 0;
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bitbang->txrx_bufs = spi_bitbang_bufs;
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if (!bitbang->master->setup) {
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if (!bitbang->setup_transfer)
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bitbang->setup_transfer =
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spi_bitbang_setup_transfer;
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bitbang->master->setup = spi_bitbang_setup;
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bitbang->master->cleanup = spi_bitbang_cleanup;
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}
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} else if (!bitbang->master->setup)
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return -EINVAL;
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/* this task is the only thing to touch the SPI bits */
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bitbang->busy = 0;
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bitbang->workqueue = create_singlethread_workqueue(
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bitbang->master->cdev.dev->bus_id);
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if (bitbang->workqueue == NULL) {
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status = -EBUSY;
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goto err1;
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}
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/* driver may get busy before register() returns, especially
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* if someone registered boardinfo for devices
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*/
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status = spi_register_master(bitbang->master);
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if (status < 0)
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goto err2;
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return status;
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err2:
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destroy_workqueue(bitbang->workqueue);
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err1:
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return status;
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}
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EXPORT_SYMBOL_GPL(spi_bitbang_start);
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/**
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* spi_bitbang_stop - stops the task providing spi communication
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*/
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int spi_bitbang_stop(struct spi_bitbang *bitbang)
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{
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unsigned limit = 500;
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spin_lock_irq(&bitbang->lock);
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bitbang->shutdown = 0;
|
|
while (!list_empty(&bitbang->queue) && limit--) {
|
|
spin_unlock_irq(&bitbang->lock);
|
|
|
|
dev_dbg(bitbang->master->cdev.dev, "wait for queue\n");
|
|
msleep(10);
|
|
|
|
spin_lock_irq(&bitbang->lock);
|
|
}
|
|
spin_unlock_irq(&bitbang->lock);
|
|
if (!list_empty(&bitbang->queue)) {
|
|
dev_err(bitbang->master->cdev.dev, "queue didn't empty\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
destroy_workqueue(bitbang->workqueue);
|
|
|
|
spi_unregister_master(bitbang->master);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(spi_bitbang_stop);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|