![Rafał Bilski](/assets/img/avatar_default.png)
Add new module option "set_max_voltage". One of the lessons learned from Adaptive Powersaver is that voltage values returned by processor are for worst case scenario. But required voltage is changing with CPU temperature. And even processors produced in the same batch can have different minimum voltage necessary for stable work at specified frequency. On Elonex Webbook, once system starts, temperature never drops below 48 deg. C. Loading module after systems start allows user to lower CPU voltage and still have stable system. Sadly C7 doesn't allow code to set frequency or voltage from outside limits. If you ask it to set voltage lower then minimum it will ignore you. Thats why it isn't possible to change minimum voltage for minimum frequency too. Changing maximum voltage on Elonex Webbook leads to very good results. Looks like VIA C7 1.6GHz 1084mV can safetly run at 892mV. This means 83% of orginal value. If same percentage applies to power generated it means 12.5W in the place of 15W. Not much, but it is better then nothing. Only C7-M makes it possible. If voltage is too low by 16mV or more you will experience kernel panic. If voltage is too low by 32mV or more you will experience system freeze. Signed-off-by: Rafał Bilski <rafalbilski@interia.pl> Signed-off-by: Dave Jones <davej@redhat.com>
481 lines
12 KiB
C
481 lines
12 KiB
C
/*
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* Based on documentation provided by Dave Jones. Thanks!
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*
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* Licensed under the terms of the GNU GPL License version 2.
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*
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* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/timex.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <asm/msr.h>
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#include <asm/tsc.h>
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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#include <linux/acpi.h>
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#include <acpi/processor.h>
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#endif
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#define EPS_BRAND_C7M 0
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#define EPS_BRAND_C7 1
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#define EPS_BRAND_EDEN 2
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#define EPS_BRAND_C3 3
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#define EPS_BRAND_C7D 4
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struct eps_cpu_data {
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u32 fsb;
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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u32 bios_limit;
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#endif
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struct cpufreq_frequency_table freq_table[];
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};
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static struct eps_cpu_data *eps_cpu[NR_CPUS];
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/* Module parameters */
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static int freq_failsafe_off;
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static int voltage_failsafe_off;
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static int set_max_voltage;
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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static int ignore_acpi_limit;
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static struct acpi_processor_performance *eps_acpi_cpu_perf;
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/* Minimum necessary to get acpi_processor_get_bios_limit() working */
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static int eps_acpi_init(void)
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{
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eps_acpi_cpu_perf = kzalloc(sizeof(struct acpi_processor_performance),
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GFP_KERNEL);
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if (!eps_acpi_cpu_perf)
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return -ENOMEM;
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if (!zalloc_cpumask_var(&eps_acpi_cpu_perf->shared_cpu_map,
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GFP_KERNEL)) {
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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return -ENOMEM;
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}
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if (acpi_processor_register_performance(eps_acpi_cpu_perf, 0)) {
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free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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return -EIO;
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}
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return 0;
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}
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static int eps_acpi_exit(struct cpufreq_policy *policy)
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{
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if (eps_acpi_cpu_perf) {
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acpi_processor_unregister_performance(eps_acpi_cpu_perf, 0);
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free_cpumask_var(eps_acpi_cpu_perf->shared_cpu_map);
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kfree(eps_acpi_cpu_perf);
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eps_acpi_cpu_perf = NULL;
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}
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return 0;
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}
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#endif
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static unsigned int eps_get(unsigned int cpu)
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{
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struct eps_cpu_data *centaur;
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u32 lo, hi;
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if (cpu)
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return 0;
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centaur = eps_cpu[cpu];
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if (centaur == NULL)
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return 0;
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/* Return current frequency */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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return centaur->fsb * ((lo >> 8) & 0xff);
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}
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static int eps_set_state(struct eps_cpu_data *centaur,
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unsigned int cpu,
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u32 dest_state)
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{
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struct cpufreq_freqs freqs;
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u32 lo, hi;
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int err = 0;
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int i;
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freqs.old = eps_get(cpu);
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freqs.new = centaur->fsb * ((dest_state >> 8) & 0xff);
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freqs.cpu = cpu;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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/* Wait while CPU is busy */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i = 0;
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while (lo & ((1 << 16) | (1 << 17))) {
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udelay(16);
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i++;
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if (unlikely(i > 64)) {
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err = -ENODEV;
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goto postchange;
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}
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}
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/* Set new multiplier and voltage */
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wrmsr(MSR_IA32_PERF_CTL, dest_state & 0xffff, 0);
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/* Wait until transition end */
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i = 0;
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do {
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udelay(16);
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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i++;
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if (unlikely(i > 64)) {
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err = -ENODEV;
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goto postchange;
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}
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} while (lo & ((1 << 16) | (1 << 17)));
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/* Return current frequency */
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postchange:
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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freqs.new = centaur->fsb * ((lo >> 8) & 0xff);
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#ifdef DEBUG
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{
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u8 current_multiplier, current_voltage;
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/* Print voltage and multiplier */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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current_voltage = lo & 0xff;
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printk(KERN_INFO "eps: Current voltage = %dmV\n",
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current_voltage * 16 + 700);
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current_multiplier = (lo >> 8) & 0xff;
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printk(KERN_INFO "eps: Current multiplier = %d\n",
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current_multiplier);
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}
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#endif
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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return err;
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}
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static int eps_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct eps_cpu_data *centaur;
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unsigned int newstate = 0;
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unsigned int cpu = policy->cpu;
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unsigned int dest_state;
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int ret;
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if (unlikely(eps_cpu[cpu] == NULL))
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return -ENODEV;
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centaur = eps_cpu[cpu];
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if (unlikely(cpufreq_frequency_table_target(policy,
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&eps_cpu[cpu]->freq_table[0],
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target_freq,
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relation,
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&newstate))) {
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return -EINVAL;
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}
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/* Make frequency transition */
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dest_state = centaur->freq_table[newstate].index & 0xffff;
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ret = eps_set_state(centaur, cpu, dest_state);
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if (ret)
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printk(KERN_ERR "eps: Timeout!\n");
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return ret;
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}
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static int eps_verify(struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy,
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&eps_cpu[policy->cpu]->freq_table[0]);
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}
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static int eps_cpu_init(struct cpufreq_policy *policy)
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{
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unsigned int i;
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u32 lo, hi;
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u64 val;
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u8 current_multiplier, current_voltage;
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u8 max_multiplier, max_voltage;
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u8 min_multiplier, min_voltage;
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u8 brand = 0;
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u32 fsb;
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struct eps_cpu_data *centaur;
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struct cpuinfo_x86 *c = &cpu_data(0);
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struct cpufreq_frequency_table *f_table;
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int k, step, voltage;
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int ret;
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int states;
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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unsigned int limit;
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#endif
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if (policy->cpu != 0)
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return -ENODEV;
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/* Check brand */
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printk(KERN_INFO "eps: Detected VIA ");
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switch (c->x86_model) {
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case 10:
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rdmsr(0x1153, lo, hi);
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brand = (((lo >> 2) ^ lo) >> 18) & 3;
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printk(KERN_CONT "Model A ");
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break;
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case 13:
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rdmsr(0x1154, lo, hi);
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brand = (((lo >> 4) ^ (lo >> 2))) & 0x000000ff;
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printk(KERN_CONT "Model D ");
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break;
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}
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switch (brand) {
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case EPS_BRAND_C7M:
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printk(KERN_CONT "C7-M\n");
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break;
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case EPS_BRAND_C7:
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printk(KERN_CONT "C7\n");
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break;
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case EPS_BRAND_EDEN:
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printk(KERN_CONT "Eden\n");
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break;
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case EPS_BRAND_C7D:
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printk(KERN_CONT "C7-D\n");
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break;
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case EPS_BRAND_C3:
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printk(KERN_CONT "C3\n");
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return -ENODEV;
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break;
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}
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/* Enable Enhanced PowerSaver */
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rdmsrl(MSR_IA32_MISC_ENABLE, val);
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if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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val |= MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP;
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wrmsrl(MSR_IA32_MISC_ENABLE, val);
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/* Can be locked at 0 */
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rdmsrl(MSR_IA32_MISC_ENABLE, val);
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if (!(val & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP)) {
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printk(KERN_INFO "eps: Can't enable Enhanced PowerSaver\n");
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return -ENODEV;
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}
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}
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/* Print voltage and multiplier */
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rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
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current_voltage = lo & 0xff;
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printk(KERN_INFO "eps: Current voltage = %dmV\n",
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current_voltage * 16 + 700);
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current_multiplier = (lo >> 8) & 0xff;
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printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
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/* Print limits */
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max_voltage = hi & 0xff;
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printk(KERN_INFO "eps: Highest voltage = %dmV\n",
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max_voltage * 16 + 700);
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max_multiplier = (hi >> 8) & 0xff;
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printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
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min_voltage = (hi >> 16) & 0xff;
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printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
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min_voltage * 16 + 700);
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min_multiplier = (hi >> 24) & 0xff;
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printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
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/* Sanity checks */
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if (current_multiplier == 0 || max_multiplier == 0
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|| min_multiplier == 0)
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return -EINVAL;
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if (current_multiplier > max_multiplier
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|| max_multiplier <= min_multiplier)
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return -EINVAL;
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if (current_voltage > 0x1f || max_voltage > 0x1f)
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return -EINVAL;
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if (max_voltage < min_voltage
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|| current_voltage < min_voltage
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|| current_voltage > max_voltage)
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return -EINVAL;
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/* Check for systems using underclocked CPU */
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if (!freq_failsafe_off && max_multiplier != current_multiplier) {
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printk(KERN_INFO "eps: Your processor is running at different "
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"frequency then its maximum. Aborting.\n");
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printk(KERN_INFO "eps: You can use freq_failsafe_off option "
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"to disable this check.\n");
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return -EINVAL;
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}
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if (!voltage_failsafe_off && max_voltage != current_voltage) {
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printk(KERN_INFO "eps: Your processor is running at different "
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"voltage then its maximum. Aborting.\n");
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printk(KERN_INFO "eps: You can use voltage_failsafe_off "
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"option to disable this check.\n");
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return -EINVAL;
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}
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/* Calc FSB speed */
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fsb = cpu_khz / current_multiplier;
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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/* Check for ACPI processor speed limit */
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if (!ignore_acpi_limit && !eps_acpi_init()) {
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if (!acpi_processor_get_bios_limit(policy->cpu, &limit)) {
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printk(KERN_INFO "eps: ACPI limit %u.%uGHz\n",
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limit/1000000,
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(limit%1000000)/10000);
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eps_acpi_exit(policy);
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/* Check if max_multiplier is in BIOS limits */
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if (limit && max_multiplier * fsb > limit) {
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printk(KERN_INFO "eps: Aborting.\n");
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return -EINVAL;
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}
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}
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}
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#endif
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/* Allow user to set lower maximum voltage then that reported
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* by processor */
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if (brand == EPS_BRAND_C7M && set_max_voltage) {
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u32 v;
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/* Change mV to something hardware can use */
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v = (set_max_voltage - 700) / 16;
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/* Check if voltage is within limits */
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if (v >= min_voltage && v <= max_voltage) {
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printk(KERN_INFO "eps: Setting %dmV as maximum.\n",
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v * 16 + 700);
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max_voltage = v;
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}
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}
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/* Calc number of p-states supported */
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if (brand == EPS_BRAND_C7M)
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states = max_multiplier - min_multiplier + 1;
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else
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states = 2;
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/* Allocate private data and frequency table for current cpu */
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centaur = kzalloc(sizeof(struct eps_cpu_data)
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+ (states + 1) * sizeof(struct cpufreq_frequency_table),
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GFP_KERNEL);
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if (!centaur)
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return -ENOMEM;
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eps_cpu[0] = centaur;
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/* Copy basic values */
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centaur->fsb = fsb;
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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centaur->bios_limit = limit;
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#endif
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/* Fill frequency and MSR value table */
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f_table = ¢aur->freq_table[0];
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if (brand != EPS_BRAND_C7M) {
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f_table[0].frequency = fsb * min_multiplier;
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f_table[0].index = (min_multiplier << 8) | min_voltage;
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f_table[1].frequency = fsb * max_multiplier;
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f_table[1].index = (max_multiplier << 8) | max_voltage;
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f_table[2].frequency = CPUFREQ_TABLE_END;
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} else {
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k = 0;
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step = ((max_voltage - min_voltage) * 256)
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/ (max_multiplier - min_multiplier);
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for (i = min_multiplier; i <= max_multiplier; i++) {
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voltage = (k * step) / 256 + min_voltage;
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f_table[k].frequency = fsb * i;
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f_table[k].index = (i << 8) | voltage;
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k++;
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}
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f_table[k].frequency = CPUFREQ_TABLE_END;
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}
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policy->cpuinfo.transition_latency = 140000; /* 844mV -> 700mV in ns */
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policy->cur = fsb * current_multiplier;
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ret = cpufreq_frequency_table_cpuinfo(policy, ¢aur->freq_table[0]);
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if (ret) {
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kfree(centaur);
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return ret;
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}
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cpufreq_frequency_table_get_attr(¢aur->freq_table[0], policy->cpu);
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return 0;
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}
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static int eps_cpu_exit(struct cpufreq_policy *policy)
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{
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unsigned int cpu = policy->cpu;
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/* Bye */
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cpufreq_frequency_table_put_attr(policy->cpu);
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kfree(eps_cpu[cpu]);
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eps_cpu[cpu] = NULL;
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return 0;
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}
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static struct freq_attr *eps_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static struct cpufreq_driver eps_driver = {
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.verify = eps_verify,
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.target = eps_target,
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.init = eps_cpu_init,
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.exit = eps_cpu_exit,
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.get = eps_get,
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.name = "e_powersaver",
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.owner = THIS_MODULE,
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.attr = eps_attr,
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};
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static int __init eps_init(void)
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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/* This driver will work only on Centaur C7 processors with
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* Enhanced SpeedStep/PowerSaver registers */
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if (c->x86_vendor != X86_VENDOR_CENTAUR
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|| c->x86 != 6 || c->x86_model < 10)
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return -ENODEV;
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if (!cpu_has(c, X86_FEATURE_EST))
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return -ENODEV;
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if (cpufreq_register_driver(&eps_driver))
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return -EINVAL;
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return 0;
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}
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static void __exit eps_exit(void)
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{
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cpufreq_unregister_driver(&eps_driver);
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}
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/* Allow user to overclock his machine or to change frequency to higher after
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* unloading module */
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module_param(freq_failsafe_off, int, 0644);
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MODULE_PARM_DESC(freq_failsafe_off, "Disable current vs max frequency check");
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module_param(voltage_failsafe_off, int, 0644);
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MODULE_PARM_DESC(voltage_failsafe_off, "Disable current vs max voltage check");
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#if defined CONFIG_ACPI_PROCESSOR || defined CONFIG_ACPI_PROCESSOR_MODULE
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module_param(ignore_acpi_limit, int, 0644);
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MODULE_PARM_DESC(ignore_acpi_limit, "Don't check ACPI's processor speed limit");
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#endif
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module_param(set_max_voltage, int, 0644);
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MODULE_PARM_DESC(set_max_voltage, "Set maximum CPU voltage (mV) C7-M only");
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MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
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MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
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MODULE_LICENSE("GPL");
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module_init(eps_init);
|
|
module_exit(eps_exit);
|