115 lines
1.9 KiB
Plaintext
115 lines
1.9 KiB
Plaintext
/dts-v1/;
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/include/ "tegra30.dtsi"
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/ {
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model = "NVIDIA Tegra30 Cardhu evaluation board";
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compatible = "nvidia,cardhu", "nvidia,tegra30";
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memory {
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reg = < 0x80000000 0x40000000 >;
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};
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pinmux@70000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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sdmmc1_clk_pz0 {
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nvidia,pins = "sdmmc1_clk_pz0";
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nvidia,function = "sdmmc1";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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sdmmc1_cmd_pz1 {
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nvidia,pins = "sdmmc1_cmd_pz1",
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"sdmmc1_dat0_py7",
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"sdmmc1_dat1_py6",
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"sdmmc1_dat2_py5",
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"sdmmc1_dat3_py4";
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nvidia,function = "sdmmc1";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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sdmmc4_clk_pcc4 {
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nvidia,pins = "sdmmc4_clk_pcc4",
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"sdmmc4_rst_n_pcc3";
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nvidia,function = "sdmmc4";
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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sdmmc4_dat0_paa0 {
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nvidia,pins = "sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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};
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};
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serial@70006000 {
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clock-frequency = < 408000000 >;
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};
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serial@70006040 {
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status = "disable";
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};
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serial@70006200 {
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status = "disable";
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};
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serial@70006300 {
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status = "disable";
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};
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serial@70006400 {
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status = "disable";
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};
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i2c@7000c000 {
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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clock-frequency = <100000>;
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};
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i2c@7000c500 {
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clock-frequency = <100000>;
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};
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i2c@7000c700 {
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clock-frequency = <100000>;
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};
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i2c@7000d000 {
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clock-frequency = <100000>;
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};
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sdhci@78000000 {
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 155 0>; /* gpio PT3 */
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power-gpios = <&gpio 31 0>; /* gpio PD7 */
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};
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sdhci@78000200 {
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status = "disable";
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};
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sdhci@78000400 {
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status = "disable";
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};
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sdhci@78000400 {
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support-8bit;
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};
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};
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