![Maneesh Soni](/assets/img/avatar_default.png)
This patch provides support for kprobes on branch instructions. The branch instruction at the probed address is actually emulated and not executed out-of-line like other normal instructions. Instead the delay-slot instruction is copied and single stepped out of line. At the time of probe hit, the original branch instruction is evaluated and the target cp0_epc is computed similar to compute_retrun_epc(). It is also checked if the delay slot instruction can be skipped, which is true if there is a NOP in delay slot or branch is taken in case of branch likely instructions. Once the delay slot instruction is single stepped the normal execution resume with the cp0_epc updated the earlier computed cp0_epc as per the branch instructions. Signed-off-by: Maneesh Soni <manesoni@cisco.com> Signed-off-by: Victor Kamensky <kamensky@cisco.com> Cc: David Daney <david.daney@cavium.com> Cc: ananth@in.ibm.com Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2914/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
677 lines
17 KiB
C
677 lines
17 KiB
C
/*
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* Kernel Probes (KProbes)
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* arch/mips/kernel/kprobes.c
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*
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* Copyright 2006 Sony Corp.
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* Copyright 2010 Cavium Networks
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*
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* Some portions copied from the powerpc version.
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*
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* Copyright (C) IBM Corporation, 2002, 2004
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kprobes.h>
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#include <linux/preempt.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
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#include <linux/slab.h>
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#include <asm/ptrace.h>
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#include <asm/branch.h>
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#include <asm/break.h>
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#include <asm/inst.h>
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static const union mips_instruction breakpoint_insn = {
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.b_format = {
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.opcode = spec_op,
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.code = BRK_KPROBE_BP,
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.func = break_op
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}
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};
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static const union mips_instruction breakpoint2_insn = {
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.b_format = {
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.opcode = spec_op,
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.code = BRK_KPROBE_SSTEPBP,
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.func = break_op
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}
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};
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DEFINE_PER_CPU(struct kprobe *, current_kprobe);
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DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
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static int __kprobes insn_has_delayslot(union mips_instruction insn)
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{
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switch (insn.i_format.opcode) {
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/*
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* This group contains:
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* jr and jalr are in r_format format.
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*/
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case spec_op:
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switch (insn.r_format.func) {
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case jr_op:
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case jalr_op:
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break;
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default:
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goto insn_ok;
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}
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/*
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* This group contains:
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* bltz_op, bgez_op, bltzl_op, bgezl_op,
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* bltzal_op, bgezal_op, bltzall_op, bgezall_op.
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*/
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case bcond_op:
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/*
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* These are unconditional and in j_format.
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*/
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case jal_op:
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case j_op:
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/*
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* These are conditional and in i_format.
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*/
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case beq_op:
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case beql_op:
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case bne_op:
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case bnel_op:
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case blez_op:
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case blezl_op:
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case bgtz_op:
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case bgtzl_op:
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/*
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* These are the FPA/cp1 branch instructions.
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*/
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case cop1_op:
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#ifdef CONFIG_CPU_CAVIUM_OCTEON
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case lwc2_op: /* This is bbit0 on Octeon */
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case ldc2_op: /* This is bbit032 on Octeon */
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case swc2_op: /* This is bbit1 on Octeon */
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case sdc2_op: /* This is bbit132 on Octeon */
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#endif
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return 1;
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default:
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break;
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}
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insn_ok:
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return 0;
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}
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/*
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* insn_has_ll_or_sc function checks whether instruction is ll or sc
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* one; putting breakpoint on top of atomic ll/sc pair is bad idea;
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* so we need to prevent it and refuse kprobes insertion for such
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* instructions; cannot do much about breakpoint in the middle of
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* ll/sc pair; it is upto user to avoid those places
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*/
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static int __kprobes insn_has_ll_or_sc(union mips_instruction insn)
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{
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int ret = 0;
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switch (insn.i_format.opcode) {
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case ll_op:
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case lld_op:
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case sc_op:
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case scd_op:
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ret = 1;
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break;
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default:
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break;
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}
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return ret;
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}
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int __kprobes arch_prepare_kprobe(struct kprobe *p)
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{
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union mips_instruction insn;
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union mips_instruction prev_insn;
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int ret = 0;
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insn = p->addr[0];
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if (insn_has_ll_or_sc(insn)) {
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pr_notice("Kprobes for ll and sc instructions are not"
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"supported\n");
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ret = -EINVAL;
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goto out;
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}
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if ((probe_kernel_read(&prev_insn, p->addr - 1,
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sizeof(mips_instruction)) == 0) &&
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insn_has_delayslot(prev_insn)) {
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pr_notice("Kprobes for branch delayslot are not supported\n");
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ret = -EINVAL;
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goto out;
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}
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/* insn: must be on special executable page on mips. */
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p->ainsn.insn = get_insn_slot();
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if (!p->ainsn.insn) {
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ret = -ENOMEM;
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goto out;
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}
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/*
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* In the kprobe->ainsn.insn[] array we store the original
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* instruction at index zero and a break trap instruction at
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* index one.
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*
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* On MIPS arch if the instruction at probed address is a
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* branch instruction, we need to execute the instruction at
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* Branch Delayslot (BD) at the time of probe hit. As MIPS also
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* doesn't have single stepping support, the BD instruction can
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* not be executed in-line and it would be executed on SSOL slot
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* using a normal breakpoint instruction in the next slot.
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* So, read the instruction and save it for later execution.
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*/
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if (insn_has_delayslot(insn))
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memcpy(&p->ainsn.insn[0], p->addr + 1, sizeof(kprobe_opcode_t));
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else
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memcpy(&p->ainsn.insn[0], p->addr, sizeof(kprobe_opcode_t));
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p->ainsn.insn[1] = breakpoint2_insn;
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p->opcode = *p->addr;
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out:
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return ret;
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}
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void __kprobes arch_arm_kprobe(struct kprobe *p)
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{
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*p->addr = breakpoint_insn;
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flush_insn_slot(p);
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}
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void __kprobes arch_disarm_kprobe(struct kprobe *p)
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{
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*p->addr = p->opcode;
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flush_insn_slot(p);
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}
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void __kprobes arch_remove_kprobe(struct kprobe *p)
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{
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free_insn_slot(p->ainsn.insn, 0);
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}
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static void save_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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kcb->prev_kprobe.kp = kprobe_running();
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kcb->prev_kprobe.status = kcb->kprobe_status;
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kcb->prev_kprobe.old_SR = kcb->kprobe_old_SR;
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kcb->prev_kprobe.saved_SR = kcb->kprobe_saved_SR;
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kcb->prev_kprobe.saved_epc = kcb->kprobe_saved_epc;
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}
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static void restore_previous_kprobe(struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
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kcb->kprobe_status = kcb->prev_kprobe.status;
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kcb->kprobe_old_SR = kcb->prev_kprobe.old_SR;
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kcb->kprobe_saved_SR = kcb->prev_kprobe.saved_SR;
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kcb->kprobe_saved_epc = kcb->prev_kprobe.saved_epc;
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}
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static void set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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__get_cpu_var(current_kprobe) = p;
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kcb->kprobe_saved_SR = kcb->kprobe_old_SR = (regs->cp0_status & ST0_IE);
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kcb->kprobe_saved_epc = regs->cp0_epc;
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}
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/**
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* evaluate_branch_instrucion -
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*
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* Evaluate the branch instruction at probed address during probe hit. The
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* result of evaluation would be the updated epc. The insturction in delayslot
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* would actually be single stepped using a normal breakpoint) on SSOL slot.
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*
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* The result is also saved in the kprobe control block for later use,
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* in case we need to execute the delayslot instruction. The latter will be
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* false for NOP instruction in dealyslot and the branch-likely instructions
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* when the branch is taken. And for those cases we set a flag as
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* SKIP_DELAYSLOT in the kprobe control block
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*/
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static int evaluate_branch_instruction(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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union mips_instruction insn = p->opcode;
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long epc;
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int ret = 0;
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epc = regs->cp0_epc;
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if (epc & 3)
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goto unaligned;
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if (p->ainsn.insn->word == 0)
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kcb->flags |= SKIP_DELAYSLOT;
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else
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kcb->flags &= ~SKIP_DELAYSLOT;
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ret = __compute_return_epc_for_insn(regs, insn);
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if (ret < 0)
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return ret;
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if (ret == BRANCH_LIKELY_TAKEN)
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kcb->flags |= SKIP_DELAYSLOT;
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kcb->target_epc = regs->cp0_epc;
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return 0;
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unaligned:
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pr_notice("%s: unaligned epc - sending SIGBUS.\n", current->comm);
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force_sig(SIGBUS, current);
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return -EFAULT;
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}
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static void prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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int ret = 0;
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regs->cp0_status &= ~ST0_IE;
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/* single step inline if the instruction is a break */
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if (p->opcode.word == breakpoint_insn.word ||
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p->opcode.word == breakpoint2_insn.word)
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regs->cp0_epc = (unsigned long)p->addr;
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else if (insn_has_delayslot(p->opcode)) {
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ret = evaluate_branch_instruction(p, regs, kcb);
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if (ret < 0) {
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pr_notice("Kprobes: Error in evaluating branch\n");
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return;
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}
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}
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regs->cp0_epc = (unsigned long)&p->ainsn.insn[0];
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}
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/*
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* Called after single-stepping. p->addr is the address of the
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* instruction whose first byte has been replaced by the "break 0"
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* instruction. To avoid the SMP problems that can occur when we
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* temporarily put back the original opcode to single-step, we
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* single-stepped a copy of the instruction. The address of this
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* copy is p->ainsn.insn.
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*
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* This function prepares to return from the post-single-step
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* breakpoint trap. In case of branch instructions, the target
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* epc to be restored.
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*/
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static void __kprobes resume_execution(struct kprobe *p,
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struct pt_regs *regs,
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struct kprobe_ctlblk *kcb)
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{
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if (insn_has_delayslot(p->opcode))
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regs->cp0_epc = kcb->target_epc;
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else {
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unsigned long orig_epc = kcb->kprobe_saved_epc;
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regs->cp0_epc = orig_epc + 4;
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}
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}
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static int __kprobes kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *p;
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int ret = 0;
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kprobe_opcode_t *addr;
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struct kprobe_ctlblk *kcb;
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addr = (kprobe_opcode_t *) regs->cp0_epc;
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/*
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* We don't want to be preempted for the entire
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* duration of kprobe processing
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*/
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preempt_disable();
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kcb = get_kprobe_ctlblk();
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/* Check we're not actually recursing */
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if (kprobe_running()) {
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p = get_kprobe(addr);
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if (p) {
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if (kcb->kprobe_status == KPROBE_HIT_SS &&
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p->ainsn.insn->word == breakpoint_insn.word) {
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regs->cp0_status &= ~ST0_IE;
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regs->cp0_status |= kcb->kprobe_saved_SR;
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goto no_kprobe;
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}
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/*
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* We have reentered the kprobe_handler(), since
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* another probe was hit while within the handler.
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* We here save the original kprobes variables and
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* just single step on the instruction of the new probe
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* without calling any user handlers.
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*/
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save_previous_kprobe(kcb);
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set_current_kprobe(p, regs, kcb);
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kprobes_inc_nmissed_count(p);
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prepare_singlestep(p, regs, kcb);
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kcb->kprobe_status = KPROBE_REENTER;
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if (kcb->flags & SKIP_DELAYSLOT) {
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resume_execution(p, regs, kcb);
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restore_previous_kprobe(kcb);
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preempt_enable_no_resched();
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}
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return 1;
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} else {
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if (addr->word != breakpoint_insn.word) {
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/*
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* The breakpoint instruction was removed by
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* another cpu right after we hit, no further
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* handling of this interrupt is appropriate
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*/
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ret = 1;
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goto no_kprobe;
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}
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p = __get_cpu_var(current_kprobe);
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if (p->break_handler && p->break_handler(p, regs))
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goto ss_probe;
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}
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goto no_kprobe;
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}
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p = get_kprobe(addr);
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if (!p) {
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if (addr->word != breakpoint_insn.word) {
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/*
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* The breakpoint instruction was removed right
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* after we hit it. Another cpu has removed
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* either a probepoint or a debugger breakpoint
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* at this address. In either case, no further
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* handling of this interrupt is appropriate.
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*/
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ret = 1;
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}
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/* Not one of ours: let kernel handle it */
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goto no_kprobe;
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}
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set_current_kprobe(p, regs, kcb);
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kcb->kprobe_status = KPROBE_HIT_ACTIVE;
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if (p->pre_handler && p->pre_handler(p, regs)) {
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/* handler has already set things up, so skip ss setup */
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return 1;
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}
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ss_probe:
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prepare_singlestep(p, regs, kcb);
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if (kcb->flags & SKIP_DELAYSLOT) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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if (p->post_handler)
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p->post_handler(p, regs, 0);
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resume_execution(p, regs, kcb);
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preempt_enable_no_resched();
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} else
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kcb->kprobe_status = KPROBE_HIT_SS;
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return 1;
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no_kprobe:
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preempt_enable_no_resched();
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return ret;
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}
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static inline int post_kprobe_handler(struct pt_regs *regs)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (!cur)
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return 0;
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if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
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kcb->kprobe_status = KPROBE_HIT_SSDONE;
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cur->post_handler(cur, regs, 0);
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}
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resume_execution(cur, regs, kcb);
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regs->cp0_status |= kcb->kprobe_saved_SR;
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/* Restore back the original saved kprobes variables and continue. */
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if (kcb->kprobe_status == KPROBE_REENTER) {
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restore_previous_kprobe(kcb);
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goto out;
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}
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reset_current_kprobe();
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out:
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preempt_enable_no_resched();
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return 1;
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}
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static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr)
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{
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struct kprobe *cur = kprobe_running();
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struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
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if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
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return 1;
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if (kcb->kprobe_status & KPROBE_HIT_SS) {
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resume_execution(cur, regs, kcb);
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regs->cp0_status |= kcb->kprobe_old_SR;
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reset_current_kprobe();
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preempt_enable_no_resched();
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}
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return 0;
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}
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/*
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* Wrapper routine for handling exceptions.
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*/
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int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
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unsigned long val, void *data)
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{
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struct die_args *args = (struct die_args *)data;
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int ret = NOTIFY_DONE;
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switch (val) {
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case DIE_BREAK:
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if (kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_SSTEPBP:
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if (post_kprobe_handler(args->regs))
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ret = NOTIFY_STOP;
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break;
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case DIE_PAGE_FAULT:
|
|
/* kprobe_running() needs smp_processor_id() */
|
|
preempt_disable();
|
|
|
|
if (kprobe_running()
|
|
&& kprobe_fault_handler(args->regs, args->trapnr))
|
|
ret = NOTIFY_STOP;
|
|
preempt_enable();
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
struct jprobe *jp = container_of(p, struct jprobe, kp);
|
|
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
|
|
|
kcb->jprobe_saved_regs = *regs;
|
|
kcb->jprobe_saved_sp = regs->regs[29];
|
|
|
|
memcpy(kcb->jprobes_stack, (void *)kcb->jprobe_saved_sp,
|
|
MIN_JPROBES_STACK_SIZE(kcb->jprobe_saved_sp));
|
|
|
|
regs->cp0_epc = (unsigned long)(jp->entry);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/* Defined in the inline asm below. */
|
|
void jprobe_return_end(void);
|
|
|
|
void __kprobes jprobe_return(void)
|
|
{
|
|
/* Assembler quirk necessitates this '0,code' business. */
|
|
asm volatile(
|
|
"break 0,%0\n\t"
|
|
".globl jprobe_return_end\n"
|
|
"jprobe_return_end:\n"
|
|
: : "n" (BRK_KPROBE_BP) : "memory");
|
|
}
|
|
|
|
int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
|
|
{
|
|
struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
|
|
|
|
if (regs->cp0_epc >= (unsigned long)jprobe_return &&
|
|
regs->cp0_epc <= (unsigned long)jprobe_return_end) {
|
|
*regs = kcb->jprobe_saved_regs;
|
|
memcpy((void *)kcb->jprobe_saved_sp, kcb->jprobes_stack,
|
|
MIN_JPROBES_STACK_SIZE(kcb->jprobe_saved_sp));
|
|
preempt_enable_no_resched();
|
|
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Function return probe trampoline:
|
|
* - init_kprobes() establishes a probepoint here
|
|
* - When the probed function returns, this probe causes the
|
|
* handlers to fire
|
|
*/
|
|
static void __used kretprobe_trampoline_holder(void)
|
|
{
|
|
asm volatile(
|
|
".set push\n\t"
|
|
/* Keep the assembler from reordering and placing JR here. */
|
|
".set noreorder\n\t"
|
|
"nop\n\t"
|
|
".global kretprobe_trampoline\n"
|
|
"kretprobe_trampoline:\n\t"
|
|
"nop\n\t"
|
|
".set pop"
|
|
: : : "memory");
|
|
}
|
|
|
|
void kretprobe_trampoline(void);
|
|
|
|
void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
|
|
struct pt_regs *regs)
|
|
{
|
|
ri->ret_addr = (kprobe_opcode_t *) regs->regs[31];
|
|
|
|
/* Replace the return addr with trampoline addr */
|
|
regs->regs[31] = (unsigned long)kretprobe_trampoline;
|
|
}
|
|
|
|
/*
|
|
* Called when the probe at kretprobe trampoline is hit
|
|
*/
|
|
static int __kprobes trampoline_probe_handler(struct kprobe *p,
|
|
struct pt_regs *regs)
|
|
{
|
|
struct kretprobe_instance *ri = NULL;
|
|
struct hlist_head *head, empty_rp;
|
|
struct hlist_node *node, *tmp;
|
|
unsigned long flags, orig_ret_address = 0;
|
|
unsigned long trampoline_address = (unsigned long)kretprobe_trampoline;
|
|
|
|
INIT_HLIST_HEAD(&empty_rp);
|
|
kretprobe_hash_lock(current, &head, &flags);
|
|
|
|
/*
|
|
* It is possible to have multiple instances associated with a given
|
|
* task either because an multiple functions in the call path
|
|
* have a return probe installed on them, and/or more than one return
|
|
* return probe was registered for a target function.
|
|
*
|
|
* We can handle this because:
|
|
* - instances are always inserted at the head of the list
|
|
* - when multiple return probes are registered for the same
|
|
* function, the first instance's ret_addr will point to the
|
|
* real return address, and all the rest will point to
|
|
* kretprobe_trampoline
|
|
*/
|
|
hlist_for_each_entry_safe(ri, node, tmp, head, hlist) {
|
|
if (ri->task != current)
|
|
/* another task is sharing our hash bucket */
|
|
continue;
|
|
|
|
if (ri->rp && ri->rp->handler)
|
|
ri->rp->handler(ri, regs);
|
|
|
|
orig_ret_address = (unsigned long)ri->ret_addr;
|
|
recycle_rp_inst(ri, &empty_rp);
|
|
|
|
if (orig_ret_address != trampoline_address)
|
|
/*
|
|
* This is the real return address. Any other
|
|
* instances associated with this task are for
|
|
* other calls deeper on the call stack
|
|
*/
|
|
break;
|
|
}
|
|
|
|
kretprobe_assert(ri, orig_ret_address, trampoline_address);
|
|
instruction_pointer(regs) = orig_ret_address;
|
|
|
|
reset_current_kprobe();
|
|
kretprobe_hash_unlock(current, &flags);
|
|
preempt_enable_no_resched();
|
|
|
|
hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) {
|
|
hlist_del(&ri->hlist);
|
|
kfree(ri);
|
|
}
|
|
/*
|
|
* By returning a non-zero value, we are telling
|
|
* kprobe_handler() that we don't want the post_handler
|
|
* to run (and have re-enabled preemption)
|
|
*/
|
|
return 1;
|
|
}
|
|
|
|
int __kprobes arch_trampoline_kprobe(struct kprobe *p)
|
|
{
|
|
if (p->addr == (kprobe_opcode_t *)kretprobe_trampoline)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct kprobe trampoline_p = {
|
|
.addr = (kprobe_opcode_t *)kretprobe_trampoline,
|
|
.pre_handler = trampoline_probe_handler
|
|
};
|
|
|
|
int __init arch_init_kprobes(void)
|
|
{
|
|
return register_kprobe(&trampoline_p);
|
|
}
|