![Brian Swetland](/assets/img/avatar_default.png)
This patch adds driver for HTC Dream camera. I guess driver is slightly higher quality than usual for staging/ , but it is fairly big and I don't feel like doing all the cleanups myself. Also some parts can probably be removed, as they did not end up in shipping hardware.. Signed-off-by: Pavel Machek <pavel@ucw.cz> Cc: Brian Swetland <swetland@google.com> Cc: Iliyan Malchev <ibm@android.com> Cc: San Mehat <san@android.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
574 lines
10 KiB
C
574 lines
10 KiB
C
/*
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* Copyright (C) 2009 QUALCOMM Incorporated.
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*/
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#include "mt9p012.h"
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#include <linux/kernel.h>
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/*Micron settings from Applications for lower power consumption.*/
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struct reg_struct mt9p012_reg_pat[2] = {
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{ /* Preview */
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/* vt_pix_clk_div REG=0x0300 */
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6, /* 5 */
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/* vt_sys_clk_div REG=0x0302 */
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1,
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/* pre_pll_clk_div REG=0x0304 */
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2,
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/* pll_multiplier REG=0x0306 */
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60,
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/* op_pix_clk_div REG=0x0308 */
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8, /* 10 */
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/* op_sys_clk_div REG=0x030A */
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1,
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/* scale_m REG=0x0404 */
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16,
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/* row_speed REG=0x3016 */
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0x0111,
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/* x_addr_start REG=0x3004 */
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8,
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/* x_addr_end REG=0x3008 */
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2597,
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/* y_addr_start REG=0x3002 */
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8,
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/* y_addr_end REG=0x3006 */
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1949,
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/* read_mode REG=0x3040
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* Preview 2x2 skipping */
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0x00C3,
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/* x_output_size REG=0x034C */
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1296,
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/* y_output_size REG=0x034E */
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972,
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/* line_length_pck REG=0x300C */
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3784,
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/* frame_length_lines REG=0x300A */
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1057,
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/* coarse_integration_time REG=0x3012 */
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16,
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/* fine_integration_time REG=0x3014 */
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1764
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},
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{ /*Snapshot*/
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/* vt_pix_clk_div REG=0x0300 */
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6,
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/* vt_sys_clk_div REG=0x0302 */
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1,
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/* pre_pll_clk_div REG=0x0304 */
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2,
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/* pll_multiplier REG=0x0306
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* 60 for 10fps snapshot */
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60,
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/* op_pix_clk_div REG=0x0308 */
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8,
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/* op_sys_clk_div REG=0x030A */
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1,
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/* scale_m REG=0x0404 */
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16,
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/* row_speed REG=0x3016 */
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0x0111,
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/* x_addr_start REG=0x3004 */
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8,
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/* x_addr_end REG=0x3008 */
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2615,
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/* y_addr_start REG=0x3002 */
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8,
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/* y_addr_end REG=0x3006 */
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1967,
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/* read_mode REG=0x3040 */
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0x0041,
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/* x_output_size REG=0x034C */
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2608,
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/* y_output_size REG=0x034E */
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1960,
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/* line_length_pck REG=0x300C */
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3911,
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/* frame_length_lines REG=0x300A //10 fps snapshot */
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2045,
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/* coarse_integration_time REG=0x3012 */
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16,
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/* fine_integration_time REG=0x3014 */
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882
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}
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};
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struct mt9p012_i2c_reg_conf mt9p012_test_tbl[] = {
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{0x3044, 0x0544 & 0xFBFF},
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{0x30CA, 0x0004 | 0x0001},
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{0x30D4, 0x9020 & 0x7FFF},
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{0x31E0, 0x0003 & 0xFFFE},
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{0x3180, 0x91FF & 0x7FFF},
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{0x301A, (0x10CC | 0x8000) & 0xFFF7},
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{0x301E, 0x0000},
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{0x3780, 0x0000},
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};
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struct mt9p012_i2c_reg_conf mt9p012_lc_tbl[] = {
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/* [Lens shading 85 Percent TL84] */
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/* P_RD_P0Q0 */
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{0x360A, 0x7FEF},
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/* P_RD_P0Q1 */
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{0x360C, 0x232C},
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/* P_RD_P0Q2 */
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{0x360E, 0x7050},
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/* P_RD_P0Q3 */
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{0x3610, 0xF3CC},
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/* P_RD_P0Q4 */
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{0x3612, 0x89D1},
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/* P_RD_P1Q0 */
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{0x364A, 0xBE0D},
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/* P_RD_P1Q1 */
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{0x364C, 0x9ACB},
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/* P_RD_P1Q2 */
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{0x364E, 0x2150},
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/* P_RD_P1Q3 */
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{0x3650, 0xB26B},
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/* P_RD_P1Q4 */
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{0x3652, 0x9511},
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/* P_RD_P2Q0 */
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{0x368A, 0x2151},
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/* P_RD_P2Q1 */
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{0x368C, 0x00AD},
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/* P_RD_P2Q2 */
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{0x368E, 0x8334},
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/* P_RD_P2Q3 */
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{0x3690, 0x478E},
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/* P_RD_P2Q4 */
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{0x3692, 0x0515},
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/* P_RD_P3Q0 */
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{0x36CA, 0x0710},
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/* P_RD_P3Q1 */
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{0x36CC, 0x452D},
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/* P_RD_P3Q2 */
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{0x36CE, 0xF352},
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/* P_RD_P3Q3 */
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{0x36D0, 0x190F},
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/* P_RD_P3Q4 */
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{0x36D2, 0x4413},
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/* P_RD_P4Q0 */
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{0x370A, 0xD112},
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/* P_RD_P4Q1 */
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{0x370C, 0xF50F},
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/* P_RD_P4Q2 */
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{0x370C, 0xF50F},
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/* P_RD_P4Q3 */
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{0x3710, 0xDC11},
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/* P_RD_P4Q4 */
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{0x3712, 0xD776},
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/* P_GR_P0Q0 */
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{0x3600, 0x1750},
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/* P_GR_P0Q1 */
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{0x3602, 0xF0AC},
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/* P_GR_P0Q2 */
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{0x3604, 0x4711},
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/* P_GR_P0Q3 */
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{0x3606, 0x07CE},
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/* P_GR_P0Q4 */
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{0x3608, 0x96B2},
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/* P_GR_P1Q0 */
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{0x3640, 0xA9AE},
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/* P_GR_P1Q1 */
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{0x3642, 0xF9AC},
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/* P_GR_P1Q2 */
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{0x3644, 0x39F1},
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/* P_GR_P1Q3 */
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{0x3646, 0x016F},
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/* P_GR_P1Q4 */
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{0x3648, 0x8AB2},
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/* P_GR_P2Q0 */
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{0x3680, 0x1752},
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/* P_GR_P2Q1 */
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{0x3682, 0x70F0},
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/* P_GR_P2Q2 */
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{0x3684, 0x83F5},
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/* P_GR_P2Q3 */
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{0x3686, 0x8392},
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/* P_GR_P2Q4 */
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{0x3688, 0x1FD6},
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/* P_GR_P3Q0 */
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{0x36C0, 0x1131},
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/* P_GR_P3Q1 */
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{0x36C2, 0x3DAF},
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/* P_GR_P3Q2 */
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{0x36C4, 0x89B4},
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/* P_GR_P3Q3 */
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{0x36C6, 0xA391},
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/* P_GR_P3Q4 */
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{0x36C8, 0x1334},
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/* P_GR_P4Q0 */
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{0x3700, 0xDC13},
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/* P_GR_P4Q1 */
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{0x3702, 0xD052},
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/* P_GR_P4Q2 */
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{0x3704, 0x5156},
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/* P_GR_P4Q3 */
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{0x3706, 0x1F13},
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/* P_GR_P4Q4 */
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{0x3708, 0x8C38},
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/* P_BL_P0Q0 */
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{0x3614, 0x0050},
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/* P_BL_P0Q1 */
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{0x3616, 0xBD4C},
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/* P_BL_P0Q2 */
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{0x3618, 0x41B0},
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/* P_BL_P0Q3 */
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{0x361A, 0x660D},
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/* P_BL_P0Q4 */
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{0x361C, 0xC590},
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/* P_BL_P1Q0 */
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{0x3654, 0x87EC},
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/* P_BL_P1Q1 */
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{0x3656, 0xE44C},
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/* P_BL_P1Q2 */
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{0x3658, 0x302E},
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/* P_BL_P1Q3 */
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{0x365A, 0x106E},
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/* P_BL_P1Q4 */
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{0x365C, 0xB58E},
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/* P_BL_P2Q0 */
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{0x3694, 0x0DD1},
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/* P_BL_P2Q1 */
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{0x3696, 0x2A50},
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/* P_BL_P2Q2 */
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{0x3698, 0xC793},
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/* P_BL_P2Q3 */
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{0x369A, 0xE8F1},
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/* P_BL_P2Q4 */
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{0x369C, 0x4174},
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/* P_BL_P3Q0 */
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{0x36D4, 0x01EF},
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/* P_BL_P3Q1 */
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{0x36D6, 0x06CF},
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/* P_BL_P3Q2 */
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{0x36D8, 0x8D91},
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/* P_BL_P3Q3 */
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{0x36DA, 0x91F0},
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/* P_BL_P3Q4 */
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{0x36DC, 0x52EF},
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/* P_BL_P4Q0 */
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{0x3714, 0xA6D2},
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/* P_BL_P4Q1 */
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{0x3716, 0xA312},
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/* P_BL_P4Q2 */
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{0x3718, 0x2695},
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/* P_BL_P4Q3 */
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{0x371A, 0x3953},
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/* P_BL_P4Q4 */
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{0x371C, 0x9356},
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/* P_GB_P0Q0 */
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{0x361E, 0x7EAF},
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/* P_GB_P0Q1 */
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{0x3620, 0x2A4C},
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/* P_GB_P0Q2 */
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{0x3622, 0x49F0},
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{0x3624, 0xF1EC},
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/* P_GB_P0Q4 */
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{0x3626, 0xC670},
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/* P_GB_P1Q0 */
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{0x365E, 0x8E0C},
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/* P_GB_P1Q1 */
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{0x3660, 0xC2A9},
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/* P_GB_P1Q2 */
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{0x3662, 0x274F},
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/* P_GB_P1Q3 */
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{0x3664, 0xADAB},
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/* P_GB_P1Q4 */
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{0x3666, 0x8EF0},
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/* P_GB_P2Q0 */
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{0x369E, 0x09B1},
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/* P_GB_P2Q1 */
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{0x36A0, 0xAA2E},
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/* P_GB_P2Q2 */
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{0x36A2, 0xC3D3},
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/* P_GB_P2Q3 */
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{0x36A4, 0x7FAF},
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/* P_GB_P2Q4 */
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{0x36A6, 0x3F34},
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/* P_GB_P3Q0 */
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{0x36DE, 0x4C8F},
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/* P_GB_P3Q1 */
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{0x36E0, 0x886E},
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/* P_GB_P3Q2 */
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{0x36E2, 0xE831},
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/* P_GB_P3Q3 */
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{0x36E4, 0x1FD0},
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/* P_GB_P3Q4 */
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{0x36E6, 0x1192},
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/* P_GB_P4Q0 */
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{0x371E, 0xB952},
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/* P_GB_P4Q1 */
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{0x3720, 0x6DCF},
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/* P_GB_P4Q2 */
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{0x3722, 0x1B55},
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/* P_GB_P4Q3 */
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{0x3724, 0xA112},
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/* P_GB_P4Q4 */
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{0x3726, 0x82F6},
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/* POLY_ORIGIN_C */
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{0x3782, 0x0510},
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/* POLY_ORIGIN_R */
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{0x3784, 0x0390},
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/* POLY_SC_ENABLE */
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{0x3780, 0x8000},
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};
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/* rolloff table for illuminant A */
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struct mt9p012_i2c_reg_conf mt9p012_rolloff_tbl[] = {
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/* P_RD_P0Q0 */
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{0x360A, 0x7FEF},
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/* P_RD_P0Q1 */
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{0x360C, 0x232C},
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/* P_RD_P0Q2 */
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{0x360E, 0x7050},
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/* P_RD_P0Q3 */
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{0x3610, 0xF3CC},
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/* P_RD_P0Q4 */
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{0x3612, 0x89D1},
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/* P_RD_P1Q0 */
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{0x364A, 0xBE0D},
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/* P_RD_P1Q1 */
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{0x364C, 0x9ACB},
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/* P_RD_P1Q2 */
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{0x364E, 0x2150},
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/* P_RD_P1Q3 */
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{0x3650, 0xB26B},
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/* P_RD_P1Q4 */
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{0x3652, 0x9511},
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/* P_RD_P2Q0 */
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{0x368A, 0x2151},
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/* P_RD_P2Q1 */
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{0x368C, 0x00AD},
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/* P_RD_P2Q2 */
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{0x368E, 0x8334},
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/* P_RD_P2Q3 */
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{0x3690, 0x478E},
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/* P_RD_P2Q4 */
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{0x3692, 0x0515},
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/* P_RD_P3Q0 */
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{0x36CA, 0x0710},
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/* P_RD_P3Q1 */
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{0x36CC, 0x452D},
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/* P_RD_P3Q2 */
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{0x36CE, 0xF352},
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/* P_RD_P3Q3 */
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{0x36D0, 0x190F},
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/* P_RD_P3Q4 */
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{0x36D2, 0x4413},
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/* P_RD_P4Q0 */
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{0x370A, 0xD112},
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/* P_RD_P4Q1 */
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{0x370C, 0xF50F},
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/* P_RD_P4Q2 */
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{0x370E, 0x6375},
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/* P_RD_P4Q3 */
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{0x3710, 0xDC11},
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/* P_RD_P4Q4 */
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{0x3712, 0xD776},
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/* P_GR_P0Q0 */
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{0x3600, 0x1750},
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/* P_GR_P0Q1 */
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{0x3602, 0xF0AC},
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/* P_GR_P0Q2 */
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{0x3604, 0x4711},
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/* P_GR_P0Q3 */
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{0x3606, 0x07CE},
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/* P_GR_P0Q4 */
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{0x3608, 0x96B2},
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/* P_GR_P1Q0 */
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{0x3640, 0xA9AE},
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/* P_GR_P1Q1 */
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{0x3642, 0xF9AC},
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/* P_GR_P1Q2 */
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{0x3644, 0x39F1},
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/* P_GR_P1Q3 */
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{0x3646, 0x016F},
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/* P_GR_P1Q4 */
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{0x3648, 0x8AB2},
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/* P_GR_P2Q0 */
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{0x3680, 0x1752},
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/* P_GR_P2Q1 */
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{0x3682, 0x70F0},
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/* P_GR_P2Q2 */
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{0x3684, 0x83F5},
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/* P_GR_P2Q3 */
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{0x3686, 0x8392},
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/* P_GR_P2Q4 */
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{0x3688, 0x1FD6},
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/* P_GR_P3Q0 */
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{0x36C0, 0x1131},
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/* P_GR_P3Q1 */
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{0x36C2, 0x3DAF},
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/* P_GR_P3Q2 */
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{0x36C4, 0x89B4},
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/* P_GR_P3Q3 */
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{0x36C6, 0xA391},
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/* P_GR_P3Q4 */
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{0x36C8, 0x1334},
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/* P_GR_P4Q0 */
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{0x3700, 0xDC13},
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/* P_GR_P4Q1 */
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{0x3702, 0xD052},
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/* P_GR_P4Q2 */
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{0x3704, 0x5156},
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/* P_GR_P4Q3 */
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{0x3706, 0x1F13},
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/* P_GR_P4Q4 */
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{0x3708, 0x8C38},
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/* P_BL_P0Q0 */
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{0x3614, 0x0050},
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/* P_BL_P0Q1 */
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{0x3616, 0xBD4C},
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/* P_BL_P0Q2 */
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{0x3618, 0x41B0},
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/* P_BL_P0Q3 */
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{0x361A, 0x660D},
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/* P_BL_P0Q4 */
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{0x361C, 0xC590},
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/* P_BL_P1Q0 */
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{0x3654, 0x87EC},
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/* P_BL_P1Q1 */
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{0x3656, 0xE44C},
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/* P_BL_P1Q2 */
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|
{0x3658, 0x302E},
|
|
/* P_BL_P1Q3 */
|
|
{0x365A, 0x106E},
|
|
/* P_BL_P1Q4 */
|
|
{0x365C, 0xB58E},
|
|
/* P_BL_P2Q0 */
|
|
{0x3694, 0x0DD1},
|
|
/* P_BL_P2Q1 */
|
|
{0x3696, 0x2A50},
|
|
/* P_BL_P2Q2 */
|
|
{0x3698, 0xC793},
|
|
/* P_BL_P2Q3 */
|
|
{0x369A, 0xE8F1},
|
|
/* P_BL_P2Q4 */
|
|
{0x369C, 0x4174},
|
|
/* P_BL_P3Q0 */
|
|
{0x36D4, 0x01EF},
|
|
/* P_BL_P3Q1 */
|
|
{0x36D6, 0x06CF},
|
|
/* P_BL_P3Q2 */
|
|
{0x36D8, 0x8D91},
|
|
/* P_BL_P3Q3 */
|
|
{0x36DA, 0x91F0},
|
|
/* P_BL_P3Q4 */
|
|
{0x36DC, 0x52EF},
|
|
/* P_BL_P4Q0 */
|
|
{0x3714, 0xA6D2},
|
|
/* P_BL_P4Q1 */
|
|
{0x3716, 0xA312},
|
|
/* P_BL_P4Q2 */
|
|
{0x3718, 0x2695},
|
|
/* P_BL_P4Q3 */
|
|
{0x371A, 0x3953},
|
|
/* P_BL_P4Q4 */
|
|
{0x371C, 0x9356},
|
|
/* P_GB_P0Q0 */
|
|
{0x361E, 0x7EAF},
|
|
/* P_GB_P0Q1 */
|
|
{0x3620, 0x2A4C},
|
|
/* P_GB_P0Q2 */
|
|
{0x3622, 0x49F0},
|
|
{0x3624, 0xF1EC},
|
|
/* P_GB_P0Q4 */
|
|
{0x3626, 0xC670},
|
|
/* P_GB_P1Q0 */
|
|
{0x365E, 0x8E0C},
|
|
/* P_GB_P1Q1 */
|
|
{0x3660, 0xC2A9},
|
|
/* P_GB_P1Q2 */
|
|
{0x3662, 0x274F},
|
|
/* P_GB_P1Q3 */
|
|
{0x3664, 0xADAB},
|
|
/* P_GB_P1Q4 */
|
|
{0x3666, 0x8EF0},
|
|
/* P_GB_P2Q0 */
|
|
{0x369E, 0x09B1},
|
|
/* P_GB_P2Q1 */
|
|
{0x36A0, 0xAA2E},
|
|
/* P_GB_P2Q2 */
|
|
{0x36A2, 0xC3D3},
|
|
/* P_GB_P2Q3 */
|
|
{0x36A4, 0x7FAF},
|
|
/* P_GB_P2Q4 */
|
|
{0x36A6, 0x3F34},
|
|
/* P_GB_P3Q0 */
|
|
{0x36DE, 0x4C8F},
|
|
/* P_GB_P3Q1 */
|
|
{0x36E0, 0x886E},
|
|
/* P_GB_P3Q2 */
|
|
{0x36E2, 0xE831},
|
|
/* P_GB_P3Q3 */
|
|
{0x36E4, 0x1FD0},
|
|
/* P_GB_P3Q4 */
|
|
{0x36E6, 0x1192},
|
|
/* P_GB_P4Q0 */
|
|
{0x371E, 0xB952},
|
|
/* P_GB_P4Q1 */
|
|
{0x3720, 0x6DCF},
|
|
/* P_GB_P4Q2 */
|
|
{0x3722, 0x1B55},
|
|
/* P_GB_P4Q3 */
|
|
{0x3724, 0xA112},
|
|
/* P_GB_P4Q4 */
|
|
{0x3726, 0x82F6},
|
|
/* POLY_ORIGIN_C */
|
|
{0x3782, 0x0510},
|
|
/* POLY_ORIGIN_R */
|
|
{0x3784, 0x0390},
|
|
/* POLY_SC_ENABLE */
|
|
{0x3780, 0x8000},
|
|
};
|
|
|
|
|
|
struct mt9p012_reg mt9p012_regs = {
|
|
.reg_pat = &mt9p012_reg_pat[0],
|
|
.reg_pat_size = ARRAY_SIZE(mt9p012_reg_pat),
|
|
.ttbl = &mt9p012_test_tbl[0],
|
|
.ttbl_size = ARRAY_SIZE(mt9p012_test_tbl),
|
|
.lctbl = &mt9p012_lc_tbl[0],
|
|
.lctbl_size = ARRAY_SIZE(mt9p012_lc_tbl),
|
|
.rftbl = &mt9p012_rolloff_tbl[0],
|
|
.rftbl_size = ARRAY_SIZE(mt9p012_rolloff_tbl)
|
|
};
|
|
|
|
|